H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 90

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 3 MCU Operating Modes
Bit
1
0
Rev. 2.00 Mar 21, 2006 page 52 of 518
REJ09B0299-0200
Bit Name
HIE
RAME
Initial Value
0
1
R/W
R/W
R/W
Controls CPU access to the keyboard matrix interrupt,
input pull-up MOS control registers (KMIMR, KMPCR,
and KMIMRA), and the 8-bit timer (TMR_X and
TMR_Y) registers (TCR_X/TCR_Y, TCSR_X/TCSR_Y,
TICRR/TCORA_Y, TICRF/TCORB_Y,
TCNT_X/TCNT_Y, TCORC/TISR, TCORA_X, and
TCORB_X, TCONRI, and TCONRS).
0: In areas H'(FF)FFF0 to H'(FF)FFF7 and H'(FF)FFFC
to H'(FF)FFFF, CPU access to 8-bit timer (TMR_X and
TMR_Y) is permitted.
1: In areas H'(FF)FFF0 to H'(FF)FFF7 and H'(FF)FFFC
to H'(FF)FFFF, CPU access to keyboard matrix
interrupt and input pull-up MOS control registers is
permitted.
Enables or disables on-chip RAM. The RAME bit is
initialized when the reset state is released.
0: On-chip RAM is disabled
1: On-chip RAM is enabled
Description
Host Interface Enable
RAM Enable