H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 340

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 I
12. Clear the IRIC flag to 0.
Rev. 2.00 Mar 21, 2006 page 302 of 518
REJ09B0299-0200
Figure 13.8 Example of Operation Timing in Master Transmit Mode (MLS = WAIT = 0)
User processing
(slave output)
(master output)
(master output)
Write 0 to ACKE in ICCR, to clear received ACKB contents to 0.
Write 0 to BBSY and SCP in ICCR. This changes SDA from low to high when SCL is high,
and generates the stop condition.
Note:* Data write
ICDRE
ICDRS
ICDRT
SDA
IRTR
SDA
IRIC
SCL
in ICDR
prohibited
Start condition generation
2
C Bus Interface (IIC)
[4] BBSY set to 1
SCP cleared to 0
(start condition issuance)
[5]
Interrupt
request
Address + R/W
Address + R/W
Bit 7
[6] ICDR write
1
Bit 6
2
Bit 5
Slave address
3
Bit 4
[6] IRIC clear
4
Bit 3
5
Bit 2
6
Bit 1
7
[9] ICDR write
R/W
Bit 0
8
[7]
A
9
Interrupt
request
[9] IRIC clear
Data 1
Bit 7
Data 1
1
Data 1
Bit 6
2