H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 359

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
10. When the stop condition is detected, that is, when SDA is changed from low to high when SCL
(master output)
(master output)
(slave output)
User processing
Slave receive mode
is high, the BBSY flag in ICCR is cleared to 0 and the STOP flag in ICSR is set to 1. When the
STOPIM bit in ICXR is 0, the IRIC flag is set to 1. If the IRIC flag has been set, it is cleared to
0.
ICDRE
SDA
SDA
SCL
ICDR
IRIC
R/W
Figure 13.24 Example of Slave Transmit Mode Operation Timing
8
A
9
[2]
[3] IRIC clear
[3] ICDR write
Bit 7
[3] IRIC clear
1
Bit 6
2
(MLS = 0)
Bit 5
3
Bit 4
Data 1
4
Data 1
Bit 3
5
Rev. 2.00 Mar 21, 2006 page 321 of 518
Slave transmit mode
Bit 2
6
Section 13 I
Bit 1
7
Bit 0
8
[5] ICDR write
2
9
C Bus Interface (IIC)
A
[4]
REJ09B0299-0200
Data 2
Bit 7
[5] IRIC clear
1
Data 2
Bit 6
2

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