H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 440

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 15 Host Interface LPC Interface (LPC)
down state. In order for a slave to transfer an interrupt request in this case, a request to restart the
clock must first be issued to the host. For details, see section 15.4.6, Host Interface Clock Start
Request (CLKRUN).
15.4.6
A request to restart the clock (LCLK) can be sent to the host processor by means of the CLKRUN
pin. With LPC data transfer and SERIRQ in continuous mode, a clock restart is never requested
since the transfer cycles are initiated by the host. With SERIRQ in quiet mode, when a host
interrupt request is generated the CLKRUN signal is driven and a clock (LCLK) restart request is
sent to the host. The timing for this operation is shown in figure 15.7.
Cases other than SERIRQ in quiet mode when clock restart is required must be handled with a
different protocol, using the PME signal, etc.
Rev. 2.00 Mar 21, 2006 page 402 of 518
REJ09B0299-0200
CLK
CLKRUN
Host Interface Clock Start Request (CLKRUN)
Pull-up enable
Drive by the slave processor
Figure 15.7 Clock Start Request Timing
1
2
Drive by the host processor
3
4
5
6

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