MA330013 Microchip Technology, MA330013 Datasheet - Page 109
![MODULE PLUG-IN DSPIC33 100TQFP](/photos/8/95/89596/ma330013_sml.jpg)
MA330013
Manufacturer Part Number
MA330013
Description
MODULE PLUG-IN DSPIC33 100TQFP
Manufacturer
Microchip Technology
Specifications of MA330013
Accessory Type
Plug-In Module (PIM) - dsPIC33FJ256MC710
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
DsPIC33
Silicon Manufacturer
Microchip
Core Architecture
DsPIC
Core Sub-architecture
DsPIC33
Silicon Core Number
DsPIC33F
Silicon Family Name
DsPIC33FJxxMCxxx
Rohs Compliant
Yes
For Use With
DM330023 - BOARD DEV DSPICDEM MCHV
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
Explorer 16 (DM240001 or DM240002)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
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REGISTER 6-11:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
U2TXIE
R/W-0
R/W-0
IC8IE
U2TXIE: UART2 Transmitter Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U2RXIE: UART2 Receiver Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT2IE: External Interrupt 2 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T5IE: Timer5 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T4IE: Timer4 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC4IE: Output Compare Channel 4 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC3IE: Output Compare Channel 3 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA2IE: DMA Channel 2 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
IC8IE: Input Capture Channel 8 Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
IC7IE: Input Capture Channel 7 Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
AD2IE: ADC2 Conversion Complete Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
INT1IE: External Interrupt 1 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U2RXIE
R/W-0
R/W-0
IC7IE
IEC1: INTERRUPT ENABLE CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
INT2IE
R/W-0
R/W-0
AD2IE
INT1IE
R/W-0
R/W-0
T5IE
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
CNIE
T4IE
OC4IE
R/W-0
R/W-0
—
x = Bit is unknown
MI2C1IE
dsPIC33F
OC3IE
R/W-0
R/W-0
DS70165E-page 107
DMA2IE
SI2C1IE
R/W-0
R/W-0
bit 8
bit 0
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