MA330013 Microchip Technology, MA330013 Datasheet - Page 28

MODULE PLUG-IN DSPIC33 100TQFP

MA330013

Manufacturer Part Number
MA330013
Description
MODULE PLUG-IN DSPIC33 100TQFP
Manufacturer
Microchip Technology
Datasheets

Specifications of MA330013

Accessory Type
Plug-In Module (PIM) - dsPIC33FJ256MC710
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
DsPIC33
Silicon Manufacturer
Microchip
Core Architecture
DsPIC
Core Sub-architecture
DsPIC33
Silicon Core Number
DsPIC33F
Silicon Family Name
DsPIC33FJxxMCxxx
Rohs Compliant
Yes
For Use With
DM330023 - BOARD DEV DSPICDEM MCHV
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
Explorer 16 (DM240001 or DM240002)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
dsPIC33F
TABLE 1-1:
DS70165E-page 26
RA0-RA7
RA9-RA10
RA12-RA15
RB0-RB15
RC1-RC4
RC12-RC15
RD0-RD15
RE0-RE9
RF0-RF8
RF12-RF13
RG0-RG3
RG6-RG9
RG12-RG15
SCK1
SDI1
SDO1
SS1
SCK2
SDI2
SDO2
SS2
SCL1
SDA1
SCL2
SDA2
SOSCI
SOSCO
TMS
TCK
TDI
TDO
T1CK
T2CK
T3CK
T4CK
T5CK
T6CK
T7CK
T8CK
T9CK
U1CTS
U1RTS
U1RX
U1TX
U2CTS
U2RTS
U2RX
U2TX
V
V
V
V
V
Legend:
DD
DDCORE
SS
REF
REF
Pin Name
+
-
CMOS = CMOS compatible input or output; Analog = Analog input
ST = Schmitt Trigger input with CMOS levels; O = Output; I = Input; P = Power
PINOUT I/O DESCRIPTIONS (CONTINUED)
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
P
P
P
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
ST/CMOS
Analog
Analog
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
PORTA is a bidirectional I/O port.
PORTB is a bidirectional I/O port.
PORTC is a bidirectional I/O port.
PORTD is a bidirectional I/O port.
PORTE is a bidirectional I/O port.
PORTF is a bidirectional I/O port.
PORTG is a bidirectional I/O port.
Synchronous serial clock input/output for SPI1.
SPI1 data in.
SPI1 data out.
SPI1 slave synchronization or frame pulse I/O.
Synchronous serial clock input/output for SPI2.
SPI2 data in.
SPI2 data out.
SPI2 slave synchronization or frame pulse I/O.
Synchronous serial clock input/output for I2C1.
Synchronous serial data input/output for I2C1.
Synchronous serial clock input/output for I2C2.
Synchronous serial data input/output for I2C2.
32.768 kHz low-power oscillator crystal input; CMOS otherwise.
32.768 kHz low-power oscillator crystal output.
JTAG Test mode select pin.
JTAG test clock input pin.
JTAG test data input pin.
JTAG test data output pin.
Timer1 external clock input.
Timer2 external clock input.
Timer3 external clock input.
Timer4 external clock input.
Timer5 external clock input.
Timer6 external clock input.
Timer7 external clock input.
Timer8 external clock input.
Timer9 external clock input.
UART1 clear to send.
UART1 ready to send.
UART1 receive.
UART1 transmit.
UART2 clear to send.
UART2 ready to send.
UART2 receive.
UART2 transmit.
Positive supply for peripheral logic and I/O pins.
CPU logic filter capacitor connection.
Ground reference for logic and I/O pins.
Analog voltage reference (high) input.
Analog voltage reference (low) input.
Preliminary
Description
© 2007 Microchip Technology Inc.

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