MA330013 Microchip Technology, MA330013 Datasheet - Page 218
![MODULE PLUG-IN DSPIC33 100TQFP](/photos/8/95/89596/ma330013_sml.jpg)
MA330013
Manufacturer Part Number
MA330013
Description
MODULE PLUG-IN DSPIC33 100TQFP
Manufacturer
Microchip Technology
Specifications of MA330013
Accessory Type
Plug-In Module (PIM) - dsPIC33FJ256MC710
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
DsPIC33
Silicon Manufacturer
Microchip
Core Architecture
DsPIC
Core Sub-architecture
DsPIC33
Silicon Core Number
DsPIC33F
Silicon Family Name
DsPIC33FJxxMCxxx
Rohs Compliant
Yes
For Use With
DM330023 - BOARD DEV DSPICDEM MCHV
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
Explorer 16 (DM240001 or DM240002)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
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dsPIC33F
18.11 Slope Control
The I
and SCLx signals for Fast mode (400 kHz). The control
bit, DISSLW, enables the user to disable slew rate con-
trol if desired. It is necessary to disable the slew rate
control for 1 MHz mode.
18.12 Clock Arbitration
Clock arbitration occurs when the master deasserts the
SCLx pin (SCLx allowed to float high) during any
receive, transmit or Restart/Stop condition. When the
SCLx pin is allowed to float high, the Baud Rate Gen-
erator (BRG) is suspended from counting until the
SCLx pin is actually sampled high. When the SCLx pin
is sampled high, the Baud Rate Generator is reloaded
with the contents of I2CxBRG and begins counting.
This ensures that the SCLx high time will always be at
least one BRG rollover count in the event that the clock
is held low by an external device.
DS70165E-page 216
2
C standard requires slope control on the SDAx
Preliminary
18.13 Multi-Master Communication, Bus
Multi-Master mode support is achieved by bus
arbitration. When the master outputs address/data bits
onto the SDAx pin, arbitration takes place when the
master outputs a ‘1’ on SDAx by letting SDAx float high
while another master asserts a ‘0’. When the SCLx pin
floats high, data should be stable. If the expected data
on SDAx is a ‘1’ and the data sampled on the
SDAx pin = 0, then a bus collision has taken place. The
master will set the I
reset the master portion of the I
Collision and Bus Arbitration
2
C master events interrupt flag and
© 2007 Microchip Technology Inc.
2
C port to its Idle state.
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