OM11077 NXP Semiconductors, OM11077 Datasheet - Page 273

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
UM10237_4
User manual
Fig 34. Receive Active/Inactive state machine
RxEnable = 1
After a reset, the state machine is in the INACTIVE state. As soon as the RxEnable bit is
set in the Command register, the state machine transitions to the ACTIVE state. As soon
as the RxEnable bit is cleared, the state machine returns to the INACTIVE state. If the
receive datapath is busy receiving a packet while the receive datapath gets disabled, the
packet will be received completely, stored to memory along with its status before returning
to the INACTIVE state. Also if the Receive descriptor array is full, the state machine will
return to the INACTIVE state.
For the state machine in
after a soft reset the receive datapath is inactive until the datapath is re-enabled.
Enabling and disabling transmission
After reset, the transmit function of the Ethernet block is disabled. The Tx transmit
datapath can be enabled by the device driver setting the TxEnable bit in the Command
register to 1.
The status of the transmit datapaths can be monitored by the device driver reading the
TxStatus bit of the Status register.
generation of the TxStatus bit.
RxStatus = 1
RxStatus = 0
INACTIVE
ACTIVE
Rev. 04 — 26 August 2009
Figure
11–34, a soft reset is like a hardware reset assertion, i.e.
Figure 11–35
RxProduceIndex = RxConsumeIndex - 1
RxEnable = 0 and not busy receiving
reset
illustrates the state machine for the
OR
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Chapter 11: LPC24XX Ethernet
UM10237
© NXP B.V. 2009. All rights reserved.
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