OM11077 NXP Semiconductors, OM11077 Datasheet - Page 376
OM11077
Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Specifications of OM11077
Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
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UM10237_4
User manual
14.4 The DMA descriptor
In DMA mode, the bits corresponding to Interrupt on NAK for Bulk OUT and Interrupt OUT
endpoints (INAK_BO and INAK_IO) should be set to 0 using the SIE Set Mode command
(Section
DMA transfers are described by a data structure called the DMA Descriptor (DD).
DDs are placed in the USB RAM. These descriptors can be located anywhere in the USB
RAM at word-aligned addresses. USB RAM is part of the system memory that is used for
the USB purposes. It is located at address 0x7FD0 0000 and is 8 kB in size.
DDs for non-isochronous endpoints are four words long. DDs for isochronous endpoints
are five words long.
The parameters associated with a DMA transfer are:
Table 13–357
Table 357. DMA descriptor
Word
position
0
1
2
•
•
•
•
•
•
The start address of the DMA buffer
The length of the DMA buffer
The start address of the next DMA descriptor
Control information
Count information (number of bytes transferred)
Status information
13–11.3).
Access
(H/W)
R
R
R
-
R
R
R/W
R/W
[1]
lists the DMA descriptor fields.
Access
(S/W)
R/W
R/W
R/W
-
R/W
R/W
R/W
R/W
Rev. 04 — 26 August 2009
Bit
position
31:0
1:0
2
3
4
15:5
31:16
31:0
Description
Next_DD_pointer (USB RAM address)
DMA_mode (00 -Normal; 01 - ATLE)
Next_DD_valid (1 - valid; 0 - invalid)
Reserved
Isochronous_endpoint (1 - isochronous;
0 - non-isochronous)
Max_packet_size
DMA_buffer_length
This value is specified in bytes for non-isochronous
endpoints and in number of packets for isochronous
endpoints.
DMA_buffer_start_addr
Chapter 13: LPC24XX USB device controller
UM10237
© NXP B.V. 2009. All rights reserved.
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