OM11077 NXP Semiconductors, OM11077 Datasheet - Page 449
OM11077
Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Specifications of OM11077
Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
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UM10237_4
User manual
4.5 UART1 Interrupt Identification Register (U1IIR - 0xE001 0008, Read
Table 401. UART1 Interrupt Enable Register (U1IER - address 0xE001 0004 when DLAB = 0)
Only)
The U1IIR provides a status code that denotes the priority and source of a pending
interrupt. The interrupts are frozen during an U1IIR access. If an interrupt occurs during
an U1IIR access, the interrupt is recorded for the next U1IIR access.
Table 402. UART1 Interrupt Identification Register (U1IIR - address 0xE001 0008, Read Only)
Bit
7
8
9
31:10 -
Bit
0
Symbol
CTS
Interrupt
Enable
ABEOIntEn
ABTOIntEn
Symbol
IntStatus
bit description
bit description
Value
Value Description
Rev. 04 — 26 August 2009
0
1
0
1
0
1
0
1
Interrupt status. Note that U1IIR[0] is active low. The
pending interrupt can be determined by evaluating
U1IIR[3:1].
At least one interrupt is pending.
No interrupt is pending.
Description
If auto-cts mode is enabled this bit enables/disables the
modem status interrupt generation on a CTS1 signal
transition. If auto-cts mode is disabled a CTS1 transition
will generate an interrupt if Modem Status Interrupt Enable
(U1IER[3]) is set.
In normal operation a CTS1 signal transition will generate
a Modem Status Interrupt unless the interrupt has been
disabled by clearing the U1IER[3] bit in the U1IER register.
In auto-cts mode a transition on the CTS1 bit will trigger an
interrupt only if both the U1IER[3] and U1IER[7] bits are
set.
Disable the CTS interrupt.
Enable the CTS interrupt.
enables the end of auto-baud interrupt.
Disable End of Auto-baud Interrupt.
Enable End of Auto-baud Interrupt.
enables the auto-baud time-out interrupt.
Disable Auto-baud Time-out Interrupt.
Enable Auto-baud Time-out Interrupt.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Chapter 17: LPC24XX UART1
UM10237
© NXP B.V. 2009. All rights reserved.
449 of 792
Reset
Value
0
0
0
NA
Reset
Value
1
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