OM11077 NXP Semiconductors, OM11077 Datasheet - Page 734
OM11077
Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Specifications of OM11077
Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
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UM10237_4
User manual
Fig 146. LLI example
8.2 Programming the GPDMA for scatter/gather DMA
8.3 Example of scatter/gather DMA
0x0A---
0x0B---
0x0C---
0x0D---
0x0E---
0x0F---
0x10---
0x11---
To program the GPDMA for scatter/gather DMA:
See
to a peripheral. The addresses of each line of data are given, in hexadecimal, at the
left-hand side of the figure. The LLIs describing the transfer are to be stored contiguously
from address 0x20000.
The first LLI, stored at 0x20000, defines the first block of data to be transferred, which is
the data stored between addresses 0x0A200 and 0x0AE00:
1. Write the LLIs for the complete DMA transfer to memory. Each linked list item contains
2. Choose a free DMA channel with the priority required. DMA channel 0 has the highest
3. Write the first linked list item, previously written to memory, to the relevant channel in
4. Write the channel configuration information to the channel Configuration Register and
5. An interrupt can be generated at the end of each LLI depending on the Terminal
four words:
– Source address.
– Destination address.
– Pointer to next LLI.
– Control word.
The last LLI has its linked list word pointer set to 0. The LLIs must be stored in the
memory where the GPDMA has access to (i.e. AHB1 SRAM and external memory).
priority and DMA channel 1 the lowest priority.
the GPDMA.
set the Channel Enable bit. The GPDMA then transfers the first and then subsequent
packets of data as each linked list item is loaded.
Count bit in the DMACCxControl Register. If this bit is set an interrupt is generated at
the end of the relevant LLI. The interrupt request must then be serviced and the
relevant bit in the DMACIntTCClear Register must be set to clear the interrupt.
Figure 32–146
0x--200
for an example of an LLI. A rectangle of memory has to be transferred
Chapter 32: LPC24XX General Purpose DMA (GPDMA) controller
Rev. 04 — 26 August 2009
0x–E00
UM10237
© NXP B.V. 2009. All rights reserved.
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