OM11077 NXP Semiconductors, OM11077 Datasheet - Page 467
OM11077
Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Specifications of OM11077
Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
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1. How to read this chapter
2. Basic configuration
3. CAN controllers
UM10237_4
User manual
The CAN controller in available on parts LPC2458 and LPC2460/68/70/78.
The CAN1/2 peripherals are configured using the following registers:
Controller Area Network (CAN) is the definition of a high performance communication
protocol for serial data communication. The CAN Controller is designed to provide a full
implementation of the CAN-Protocol according to the CAN Specification Version 2.0B.
Microcontrollers with this on-chip CAN controller are used to build powerful local networks
by supporting distributed real-time control with a very high level of security. The
applications are automotive, industrial environments, and high speed networks as well as
low cost multiplex wiring. The result is a strongly reduced wiring harness and enhanced
diagnostic and supervisory capabilities.
The CAN block is intended to support multiple CAN buses simultaneously, allowing the
device to be used as a gateway, switch, or router among a number of CAN buses in
various applications.
The CAN module consists of two elements: the controller and the Acceptance Filter. All
registers and the RAM are accessed as 32 bit words.
1. Power: In the PCONP register
2. Peripheral clock: In the PCLK_SEL0 register
3. Wakeup: Use the INTWAKE register
4. Pins: Select CAN1/2 pins and pin modes in registers PINSELn and PINMODEn (see
5. Interrupts: CAN interrupts are enabled using the CAN1/2IER registers
6. CAN controller initialization: see CANMOD register
UM10237
Chapter 18: LPC24XX CAN controllers CAN1/2
Rev. 04 — 26 August 2009
Remark: On reset, the CAN1/2 blocks are disabled (PCAN1/2 = 0).
for the acceptance filter, PCLK_ACF. PCLK_CAN1/2 and PCLK_ACF must be set to
the same value.
Remark: If CAN baudrates above 100 kbit/s (see
select the IRC as the clock source (see
wake up the microcontroller from Power-down mode.
Section
(Table
(Table
18–424). Interrupts are enabled in the VIC using the VICIntEnable register
7–106).
9–5).
Rev. 04 — 26 August 2009
(Table
(Table
4–63), set bits PCAN1/2.
Table
4–62) to enable the CAN controllers to
(Table
4–42).
Table
4–56), select PCLK_CAN1/2 and,
(Section
18–425) are needed, do not
18–8.1).
© NXP B.V. 2009. All rights reserved.
User manual
467 of 792
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