C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 123

DEV KIT FOR C8051F320/F321

C8051F320DK

Manufacturer Part Number
C8051F320DK
Description
DEV KIT FOR C8051F320/F321
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F320DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F320
Silicon Family Name
C8051F32x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F320, C8051F321
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1260

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F320DK
Manufacturer:
SiliconL
Quantity:
4
13.4. System and USB Clock Selection
The internal oscillator requires little start-up time and may be selected as the system or USB clock immedi-
ately following the OSCICN write that enables the internal oscillator. External crystals and ceramic resona-
tors typically require a start-up time before they are settled and ready for use. The Crystal Valid Flag
(XTLVLD in register OSCXCN) is set to ‘1’ by hardware when the external oscillator is settled. To avoid
reading a false XTLVLD, in crystal mode software should delay at least 1 ms between enabling the
external oscillator and checking XTLVLD. RC and C modes typically require no startup time.
13.4.1. System Clock Selection
The CLKSL[1:0] bits in register CLKSEL select which oscillator source is used as the system clock.
CLKSL[1:0] must be set to 01b for the system clock to run from the external oscillator; however the exter-
nal oscillator may still clock certain peripherals (timers, PCA, USB) when the internal oscillator is selected
as the system clock. The system clock may be switched on-the-fly between the internal oscillator, external
oscillator, and 4x Clock Multiplier so long as the selected oscillator is enabled and has settled.
13.4.2. USB Clock Selection
The USBCLK[2:0] bits in register CLKSEL select which oscillator source is used as the USB clock. The
USB clock may be derived from the 4x Clock Multiplier output, a divided version of the internal oscillator, or
a divided version of the external oscillator. Note that the USB clock must be 48 MHz when operating USB0
as a Full Speed Function; the USB clock must be 6 MHz when operating USB0 as a Low Speed Function.
See Figure 13.5 for USB clock selection options.
Some example USB clock configurations for Full and Low Speed mode are given below:
USB Clock
Clock Multiplier Input
Internal Oscillator
USB Clock
Clock Multiplier Input
External Oscillator
*Note: Clock Recovery must be enabled for this configuration.
Clock Signal
Clock Signal
Table 13.1. Typical USB Full Speed Clock Settings
Clock Multiplier
Internal Oscillator*
Divide by 1
Clock Multiplier
External Oscillator
Crystal Oscillator Mode
12 MHz Crystal
Input Source Selection
Input Source Selection
External Oscillator
Internal Oscillator
Rev. 1.4
USBCLK = 000b
MULSEL = 00b
IFCN = 11b
USBCLK = 000b
MULSEL = 01b
XOSCMD = 110b
XFCN = 111b
Register Bit Settings
Register Bit Settings
C8051F320/1
123

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