C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 205

• Manufacturer Part Number: C8051F320DK
• Description: DEV KIT FOR C8051F320/F321
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F320DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F320/F321
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F320
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F320, C8051F321
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1260

Bits 7–0: SPI0DAT: SPI0 Transmit and Receive Data.
Bits 7–0: SCR7-SCR0: SPI0 Clock Rate.
Example: If SYSCLK = 2 MHz and SPI0CKR = 0x04,
f
SCK
SCR7
f
R/W
Bit7
R/W
SCK
Bit7
=
=
The SPI0DAT register is used to transmit and receive SPI0 data. Writing data to SPI0DAT
places the data into the transmit buffer and initiates a transfer when in Master Mode. A read
of SPI0DAT returns the contents of the receive buffer.
These bits determine the frequency of the SCK output when the SPI0 module is configured
for master mode operation. The SCK clock frequency is a divided version of the system
clock, and is given in the following equation, where SYSCLK is the system clock frequency
and SPI0CKR is the 8-bit value held in the SPI0CKR register.
for 0 <= SPI0CKR <= 255
200kHz
f
SCK
------------------------- -
2
2000000
SCR6

R/W
Bit6
R/W
Bit6

=
4
SFR Definition 18.4. SPI0DAT: SPI0 Data Register
+
------------------------------------------------ -
2
SFR Definition 18.3. SPI0CKR: SPI0 Clock Rate

1


SCR5
SPI0CKR
SYSCLK
R/W
Bit5
R/W
Bit5
SCR4
R/W
+
Bit4
R/W
Bit4
1

Rev. 1.4
SCR3
R/W
R/W
Bit3
Bit3
SCR2
R/W
R/W
Bit2
Bit2
SCR1
R/W
Bit1
R/W
Bit1
C8051F320/1
SFR Address: 0xA2
SCR0
R/W
R/W
Address:
Bit0
Bit0
SFR
0xA3
00000000
00000000
Reset Value
Reset Value
205