C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 79

• Manufacturer Part Number: C8051F320DK
• Description: DEV KIT FOR C8051F320/F321
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F320DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F320/F321
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F320
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F320, C8051F321
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1260

9.2.6. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the CIP-51's resources and peripherals. The
CIP-51 duplicates the SFRs found in a typical 8051 implementation as well as implementing additional
SFRs used to configure and access the sub-systems unique to the MCU. This allows the addition of new
functionality while retaining compatibility with the MCS-51™ instruction set. Table 9.2 lists the SFRs imple-
mented in the CIP-51 System Controller.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, SCON0, IE, etc.) are bit-
addressable as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied
addresses in the SFR space are reserved for future use. Accessing these areas will have an indeterminate
effect and should be avoided. Refer to the corresponding pages of the datasheet, as indicated in Table 9.3,
for a detailed description of each register.
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2 PCA0CPL3 PCA0CPH3
E0
D8 PCA0CN
D0
C8 TMR2CN
C0 SMB0CN
B8
B0
A8
A0
F8
F0
98
90
88
80
(bit addressable)
SPI0CN
SCON0
TCON
PSW
ACC
0(8)
P3
P2
P1
P0
IP
IE
B
Table 9.2. Special Function Register (SFR) Memory Map
OSCXCN
SPI0CFG
PCA0MD
REG0CN
TMR3CN
REF0CN
SMB0CF
CLKMUL
P0MDIN
CLKSEL
PCA0L
SBUF0
TMOD
XBR0
1(9)
SP
PCA0CPM
TMR2RLL TMR2RLH
SMB0DAT ADC0GTL ADC0GTH ADC0LTL
TMR3RLL TMR3RLH
SPI0CKR
CPT1CN
P1MDIN
OSCICN
EMI0CN
AMX0N
PCA0H
XBR1
DPL
2(A)
TL0
0
PCA0CPL0 PCA0CPH0 PCA0CPL4 PCA0CPH4
PCA0CPM
SPI0DAT P0MDOUT P1MDOUT P2MDOUT
CPT0CN
P2MDIN
OSCICL
AMX0P
DPH
3(B)
TL1
1
Rev. 1.4
PCA0CPM
CPT1MD
ADC0CF
P3MDIN
P0SKIP
IT01CF
TMR2L
TMR3L
TH0
4(C)
2
PCA0CPM
CPT0MD
P1SKIP
TMR2H
TMR3H
ADC0L
TH1
5(D)
3
C8051F320/1
PCA0CPM
USB0ADR
ADC0LTH
CPT1MX
CKCON
P2SKIP
ADC0H
FLSCL
EIP1
EIE1
6(E)
4
P3MDOUT
USB0XCN
USB0DAT
VDM0CN
RSTSRC
CPT0MX
FLKEY
PSCTL
PCON
EIP2
EIE2
7(F)
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