C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 5

• Manufacturer Part Number: C8051F320DK
• Description: DEV KIT FOR C8051F320/F321
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F320DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F320/F321
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F320
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F320, C8051F321
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1260

14. Port Input/Output ................................................................................................ 126
15. Universal Serial Bus Controller (USB)................................................................ 139
16. SMBus ................................................................................................................... 169
14.1.Priority Crossbar Decoder .............................................................................. 128
14.2.Port I/O Initialization ....................................................................................... 130
14.3.General Purpose Port I/O ............................................................................... 132
15.1.Endpoint Addressing ...................................................................................... 140
15.2.USB Transceiver ............................................................................................ 140
15.3.USB Register Access ..................................................................................... 142
15.4.USB Clock Configuration................................................................................ 146
15.5.FIFO Management ......................................................................................... 147
15.6.Function Addressing....................................................................................... 149
15.7.Function Configuration and Control................................................................ 149
15.8.Interrupts ........................................................................................................ 152
15.9.The Serial Interface Engine ............................................................................ 157
15.10.Endpoint0 ..................................................................................................... 157
15.11.Configuring Endpoints1–3 ............................................................................ 161
15.12.Controlling Endpoints1–3 IN......................................................................... 161
15.13.Controlling Endpoints1–3 OUT..................................................................... 164
16.1.Supporting Documents ................................................................................... 170
16.2.SMBus Configuration...................................................................................... 170
16.3.SMBus Operation ........................................................................................... 170
16.4.Using the SMBus............................................................................................ 172
16.5.SMBus Transfer Modes.................................................................................. 180
13.4.1.System Clock Selection ......................................................................... 123
13.4.2.USB Clock Selection .............................................................................. 123
15.5.1.FIFO Split Mode ..................................................................................... 147
15.5.2.FIFO Double Buffering ........................................................................... 148
15.5.3.FIFO Access .......................................................................................... 148
15.10.1.Endpoint0 SETUP Transactions .......................................................... 158
15.10.2.Endpoint0 IN Transactions................................................................... 158
15.10.3.Endpoint0 OUT Transactions............................................................... 159
15.12.1.Endpoints1-3 IN Interrupt or Bulk Mode............................................... 161
15.12.2.Endpoints1-3 IN Isochronous Mode..................................................... 162
15.13.1.Endpoints1-3 OUT Interrupt or Bulk Mode........................................... 164
15.13.2.Endpoints1-3 OUT Isochronous Mode................................................. 165
16.3.1.Arbitration............................................................................................... 171
16.3.2.Clock Low Extension.............................................................................. 171
16.3.3.SCL Low Timeout................................................................................... 171
16.3.4.SCL High (SMBus Free) Timeout .......................................................... 172
16.4.1.SMBus Configuration Register............................................................... 173
16.4.2.SMB0CN Control Register ..................................................................... 176
16.4.3.Data Register ......................................................................................... 179
16.5.1.Master Transmitter Mode ....................................................................... 180
16.5.2.Master Receiver Mode ........................................................................... 181
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C8051F320/1
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