C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 144

• Manufacturer Part Number: C8051F320DK
• Description: DEV KIT FOR C8051F320/F321
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F320DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F320/F321
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F320
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F320, C8051F321
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1260

C8051F320/1
144
USB Register
OUT1INT
FRAMEH
FRAMEL
CLKREC
POWER
R/W
OUT1IE
Bit7
FADDR
IN1INT
CMINT
INDEX
FIFOn
Name
IN1IE
CMIE
This SFR is used to indirectly read and write USB0 registers.
Write Procedure:
1. Poll for BUSY (USB0ADR.7) => ‘0’.
2. Load the target USB0 register address into the USBADDR bits in register USB0ADR.
3. Write data to USB0DAT.
4. Repeat (Step 2 may be skipped when writing to the same USB0 register).
Read Procedure:
1. Poll for BUSY (USB0ADR.7) => ‘0’.
2. Load the target USB0 register address into the USBADDR bits in register USB0ADR.
3. Write ‘1’ to the BUSY bit in register USB0ADR (steps 2 and 3 can be performed in the
4. Poll for BUSY (USB0ADR.7) => ‘0’.
5. Read data from USB0DAT.
6. Repeat from Step 2 (Step 2 may be skipped when reading the same USB0 register; Step 3
same write).
may be skipped when the AUTORD bit (USB0ADR.6) is logic 1).
R/W
Bit6
USB Register
0x20-0x23
Address
SFR Definition 15.3. USB0DAT: USB0 Data
0x0C
0x0D
0x02
0x04
0x06
0x07
0x09
0x0B
0x00
0x0E
0x0F
0x01
R/W
Table 15.2. USB0 Controller Registers
Bit5
Endpoint0 and Endpoints1-3 IN Interrupt Flags
Endpoints1-3 OUT Interrupt Flags
Common USB Interrupt Flags
Endpoint0 and Endpoints1-3 IN Interrupt Enables
Endpoints1-3 OUT Interrupt Enables
Common USB Interrupt Enables
Function Address
Power Management
Frame Number Low Byte
Frame Number High Byte
Endpoint Index Selection
Clock Recovery Control
Endpoints0-3 FIFOs
R/W
Bit4
USB0DAT
Common Registers
Interrupt Registers
Rev. 1.4
R/W
Bit3
Description
R/W
Bit2
R/W
Bit1
R/W
Bit0
Page Number
SFR Address:
00000000
Reset Value
153
154
156
146
155
156
157
149
151
152
152
145
148
0x97