C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 135

• Manufacturer Part Number: C8051F320DK
• Description: DEV KIT FOR C8051F320/F321
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F320DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F320/F321
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F320
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F320, C8051F321
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1260

Bits7–0: P2.[7:0]
Note: P2.7–P2.4 only available on C8051F320 devices. Writes to these Ports do not require
Bits7–0: Output Configuration Bits for P1.7-P1.0 (respectively): ignored if corresponding bit in regis-
Bits7–0: P1SKIP[7:0]: Port1 Crossbar Skip Enable Bits.
P2.7
R/W
R/W
R/W
Bit7
Bit7
Bit7
ter P1MDIN is logic 0.
0: Corresponding P1.n Output is open-drain.
1: Corresponding P1.n Output is push-pull.
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil-
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P1.n pin is not skipped by the Crossbar.
1: Corresponding P1.n pin is skipped by the Crossbar.
Write - Output appears on I/O pins per Crossbar Registers (when XBARE = ‘1’).
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P2MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P2MDIN. Directly reads Port
pin when configured as digital input.
0: P2.n pin is logic low.
1: P2.n pin is logic high.
XBARE = ‘1’.
SFR Definition 14.9. P1MDOUT: Port1 Output Mode Register
P2.6
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 14.10. P1SKIP: Port1 Skip Register
SFR Definition 14.11. P2: Port2 Register
P2.5
R/W
R/W
R/W
Bit5
Bit5
Bit5
P2.4
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 1.4
P2.3
R/W
R/W
R/W
Bit3
Bit3
Bit3
P2.2
R/W
R/W
R/W
Bit2
Bit2
Bit2
P2.1
R/W
R/W
R/W
Bit1
Bit1
Bit1
C8051F320/1
(bit addressable)
P2.0
R/W
R/W
R/W
Bit0
Bit0
Bit0
SFR Address:
SFR Address:
00000000
Reset Value
00000000
Reset Value
Reset Value
11111111
Address:
0xA5
0xA0
0xD5
SFR
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