C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 134

• Manufacturer Part Number: C8051F320DK
• Description: DEV KIT FOR C8051F320/F321
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F320DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F320/F321
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F320
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F320, C8051F321
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1260

C8051F320/1
134
Bits7–0: P0SKIP[7:0]: Port0 Crossbar Skip Enable Bits.
Bits7–0: P1.[7:0]
Bits7–0: Analog Input Configuration Bits for P1.7-P1.0 (respectively).
P1.7
R/W
R/W
R/W
Bit7
Bit7
Bit7
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil-
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P0.n pin is not skipped by the Crossbar.
1: Corresponding P0.n pin is skipped by the Crossbar.
Write - Output appears on I/O pins per Crossbar Registers (when XBARE = ‘1’).
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P1MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P1MDIN. Directly reads Port
pin when configured as digital input.
0: P1.n pin is logic low.
1: P1.n pin is logic high.
Port pins configured as analog inputs have their weak pull-up, digital driver, and digital
receiver disabled.
0: Corresponding P1.n pin is configured as an analog input.
1: Corresponding P1.n pin is not configured as an analog input.
P1.6
SFR Definition 14.8. P1MDIN: Port1 Input Mode Register
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 14.6. P0SKIP: Port0 Skip Register
SFR Definition 14.7. P1: Port1 Register
P1.5
R/W
R/W
R/W
Bit5
Bit5
Bit5
P1.4
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 1.4
P1.3
R/W
R/W
Bit3
Bit3
R/W
Bit3
P1.2
R/W
R/W
R/W
Bit2
Bit2
Bit2
P1.1
R/W
R/W
R/W
Bit1
Bit1
Bit1
(bit addressable)
P1.0
R/W
R/W
R/W
Bit0
Bit0
Bit0
SFR Address:
SFR Address:
00000000
Reset Value
Reset Value
Reset Value
11111111
11111111
Address:
0xF2
0xD4
0x90
SFR