US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 125

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
4.1
Clock oscillator circuitry (CPG: clock pulse generator) is provided on-chip, including both a
system clock pulse generator and a subclock pulse generator. The system clock pulse generator
consists of a system clock oscillator and system clock dividers. The subclock pulse generator
consists of a subclock oscillator circuit and a subclock divider.
In the H8/38124 Group, the system clock pulse generator includes an on-chip oscillator.
4.1.1
Figure 4.1 shows a block diagram of the clock pulse generators of the H8/38024, H8/38024S, and
H8/38024R Group. Figure 4.2 shows a block diagram of the clock pulse generators of the
H8/38124 Group.
OSC
OSC
X
X
1
2
1
2
Overview
Block Diagram
System clock pulse generator
Subclock pulse generator
System clock
Subclock
oscillator
oscillator
(H8/38024 Group, H8/38024S Group, H8/38024R Group)
Figure 4.1(1) Block Diagram of Clock Pulse Generators
Section 4 Clock Pulse Generators
φ
(
(
φ
f
f
W
OSC
W
OSC
)
)
(1/2, 1/4, 1/8)
System clock
divider (1/2)
Subclock
divider
φ
φ
φ
φ
OSC
W
W
W
/2
/4
/8
/2
System
divider
clock
Rev. 8.00 Mar. 09, 2010 Page 103 of 658
φ
φ
φ
φ
OSC
OSC
OSC
OSC
/128
/64
/32
/16
Section 4 Clock Pulse Generators
Prescaler W
Prescaler S
(13 bits)
φ
φ
(5 bits)
SUB
REJ09B0042-0800
φ/2
to
φ/8192
φ
φ
φ
φ
to
φ
W
W
W
W
W
/2
/4
/8
/128

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