US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 128

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 4 Clock Pulse Generators
Bit 2—IRQAEC Flag (IRQAECF)
This bit indicates the IRQAEC pin input level set during resets.
Bit 2
IRQAECF
0
1
Bit 1—OSC Flag (OSCF)
This bit indicates the oscillator operating with the system clock pulse generator.
Bit 1
OSCF
0
1
Bit 0—Reserved
This bit is reserved. Never write 1 to this bit, as it can cause the LSI to malfunction.
4.2
Clock pulses can be supplied to the system clock divider either by connecting a crystal or ceramic
oscillator, or by providing external clock input. As shown in figure 4.2, the H8/38124 Group
supports selection between a system clock oscillator and an on-chip oscillator. See section 4.2,
On-Chip Oscillator Selection Method, for information on selecting the on-chip oscillator.
Connecting a Crystal Oscillator
Figure 4.3(1) shows a typical method of connecting a crystal oscillator to the H8/38024 or
H8/38024R Group, and figure 4.3(2) shows a typical method of connecting a crystal oscillator to
the H8/38024S and H8/38124 Group.
Rev. 8.00 Mar. 09, 2010 Page 106 of 658
REJ09B0042-0800
System Clock Generator
Description
IRQAEC pin set to GND during resets
IRQAEC pin set to V
Description
System clock oscillator operating (on-chip oscillator stopped)
On-chip oscillator operating (system clock oscillator stopped)
CC
during resets

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