US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 53

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.3.2
Figure 2.4 indicates the data formats in memory. The H8/300L CPU can access word data stored
in memory (MOV.W instruction), but the word data must always begin at an even address. If word
data starting at an odd address is accessed, the least significant bit of the address is regarded as 0,
and the word data starting at the preceding address is accessed. The same applies to instruction
codes.
When the stack is accessed using R7 as an address register, word access should always be
performed. When the CCR is pushed on the stack, two identical copies of the CCR are pushed to
make a complete word. When they are restored, the lower byte is ignored.
Byte data (CCR) on stack
Memory Data Formats
Note: * Ignored on return
[Legend]
CCR: Condition code register
Word data on stack
Data Type
Word data
Byte data
1-bit data
Figure 2.4 Memory Data Formats
Even address
Even address
Even address
Odd address
Odd address
Odd address
Address
Address n
Address n
MSB
MSB
MSB
MSB
MSB
7
7
Rev. 8.00 Mar. 09, 2010 Page 31 of 658
6
5
Data Format
Upper 8 bits
Lower 8 bits
4
CCR *
CCR
3
2
REJ09B0042-0800
1
Section 2 CPU
LSB
LSB
LSB
LSB
LSB
0
0