US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 69

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Instruction
BXOR
BIXOR
BLD
BILD
BST
BIST
Note:
Certain precautions are required in bit manipulation. See section 2.9.2, Notes on Bit
Manipulation, for details.
Figure 2.7 lists the format of the bit manipulation instructions.
* Size: Operand size
B:
Byte
Size *
B
B
B
B
B
B
C ⊕ [~(<bit-No.> of <EAd>)] → C
Function
C ⊕ (<bit-No.> of <EAd>) → C
XORs the C flag with a specified bit in a general register or
memory, and stores the result in the C flag.
XORs the C flag with the inverse of a specified bit in a general
register or memory, and stores the result in the C flag.
The bit number is specified by 3-bit immediate data.
(<bit-No.> of <EAd>) → C
Copies a specified bit in a general register or memory to the C flag.
~ (<bit-No.> of <EAd>) → C
Copies the inverse of a specified bit in a general register or
memory to the C flag.
The bit number is specified by 3-bit immediate data.
C → (<bit-No.> of <EAd>)
Copies the C flag to a specified bit in a general register or memory.
~ C → (<bit-No.> of <EAd>)
Copies the inverse of the C flag to a specified bit in a general
register or memory.
The bit number is specified by 3-bit immediate data.
Rev. 8.00 Mar. 09, 2010 Page 47 of 658
REJ09B0042-0800
Section 2 CPU