US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 42

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 1 Overview
Type
Clock
pins
System
control
Interrupt
pins
Rev. 8.00 Mar. 09, 2010 Page 20 of 658
REJ09B0042-0800
Symbol
OSC
OSC
X
X
RES
TEST
IRQ
IRQ
IRQ
IRQ
IRQAEC 60
1
2
0
1
3
4
1
2
FP-80A
TFP-80C FP-80B TLP-85V
10
9
6
7
12
11
72
76
5
3
12
11
8
9
14
13
74
78
7
5
62
Pin No.
F2
E3
D3
D2
F3
E2
C5
B3
D1
B2
C10
Pad
No. *
11
10
6
7
13
12
73
77
5
3
61
1
Pad
No. *
12
11
7
8
14
13
74
78
6
4
62
2
Pad
No. *
10
9
6
7
12
11
72
76
5
3
60
3
I/O
Input
Output
Input
Output
Input
Input
Input
Input
Name and Functions
These pins connect to a
crystal or ceramic
oscillator, or can be used
to input an external clock.
See section 4, Clock
Pulse Generators, for a
typical connection
diagram.
These pins connect to a
32.768-kHz or 38.4-kHz *
crystal oscillator.
See section 4, Clock
Pulse Generators, for a
typical connection
diagram.
Reset: When this pin is
driven low, the chip is
reset
Test pin: This pin is
reserved and cannot be
used. It should be
connected to V
IRQ interrupt request 0,
1, 3, and 4: These are
input pins for edge-
sensitive external
interrupts, with a selection
of rising or falling edge
Asynchronous event
counter event signal:
This is an interrupt input
pin for enabling
asynchronous event
input.
On the H8/38124 Group,
this must be fixed at V
or GND because the
oscillator is selected by
the input level during
resets. Refer to section 4,
Clock Pulse Generators,
for information on the
selection method.
SS
.
CC
5

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