US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 294

• Manufacturer Part Number: US38024-BAG1
• Description: DEV EVALUATION KIT H8/38024
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of US38024-BAG1

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8/38024
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 9 Timers
Bit 2—Compare Match Flag L (CMFL)
Bit 2 is a status flag indicating that TCFL has matched OCRFL. This flag is set by hardware and
cleared by software. It cannot be set by software.
Bit 2
CMFL
0
1
Bit 1—Timer Overflow Interrupt Enable L (OVIEL)
Bit 1 selects enabling or disabling of interrupt generation when TCFL overflows.
Bit 1
OVIEL
0
1
Bit 0—Counter Clear L (CCLRL)
Bit 0 selects whether TCFL is cleared when TCFL and OCRFL match.
Bit 0
CCLRL
0
1
Rev. 8.00 Mar. 09, 2010 Page 272 of 658
REJ09B0042-0800
Description
Clearing condition:
After reading CMFL = 1, cleared by writing 0 to CMFL
Setting condition:
Set when the TCFL value matches the OCRFL value
Description
TCFL overflow interrupt request is disabled
TCFL overflow interrupt request is enabled
Description
TCFL clearing by compare match is disabled
TCFL clearing by compare match is enabled
(initial value)
(initial value)
(initial value)