US38024-BAG1 Renesas Electronics America, US38024-BAG1 Datasheet - Page 374

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US38024-BAG1

Manufacturer Part Number
US38024-BAG1
Description
DEV EVALUATION KIT H8/38024
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet

Specifications of US38024-BAG1

Contents
2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
For Use With/related Products
H8/38024
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 10 Serial Communication Interface
Table 10.4 Relation between n and Clock
n
0
0
2
3
Notes: 1. φ w/2 clock in active (medium-speed/high-speed) mode and sleep mode
Table 10.5 shows the maximum bit rate for each frequency. The values shown are for active
(high-speed) mode.
Table 10.5 Maximum Bit Rate for Each Frequency (Asynchronous Mode)
OSC (MHz)
0.0384 *
2
2.4576
4
10
16
20
Note: * When SMR is set up to CKS1 = 0, CKS0 = 1.
Rev. 8.00 Mar. 09, 2010 Page 352 of 658
REJ09B0042-0800
2. φ w clock in subactive mode and subsleep mode
In subactive or subsleep mode, SCI3 can be operated when CPU clock is φw/2 only.
Clock
φ
φw/2 *
φ/16
φ/64
1
φ (MHz)
0.0192
1
1.2288
2
5
8
10
/φw *
2
Maximum Bit Rate
(bit/s)
600
31250
38400
62500
156250
250000
312500
CKS1
0
0
1
1
SMR Setting
n
0
0
0
0
0
0
0
CKS0
0
1
0
1
Setting
N
0
0
0
0
0
0
0

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