afs600 Actel Corporation, afs600 Datasheet - Page 217

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afs600

Manufacturer Part Number
afs600
Description
Actel Fusion Programmable System Chips Mixed-signal Family With Optional Arm Support
Manufacturer
Actel Corporation
Datasheet

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Pin Descriptions
Supply Pins
GND
Ground supply voltage to the core, I/O outputs, and I/O
logic.
GNDQ
Quiet ground supply voltage to input buffers of I/O
banks. Within the package, the GNDQ plane is
decoupled from the simultaneous switching noise
originated from the output buffer ground domain. This
minimizes the noise transfer within the package and
improves input signal integrity. GNDQ needs to always
be connected on the board to GND. Note: In FG256,
FG484, and FG676 packages, GNDQ and GND pins are
connected within the package and are labeled as GND
pins in the respective package pin assignment tables.
ADCGNDREF
Analog ground reference used by the ADC. This pad
should be connected to a quiet analog ground.
GNDA
Quiet ground supply voltage to the Analog Block of
Fusion devices. The use of a separate analog ground
helps isolate the analog functionality of the Fusion
device from any digital switching noise. A 0.2 V
maximum differential voltage between GND and GNDA/
GNDQ should apply to system implementation.
GNDAQ
Quiet ground supply voltage to the analog I/O of Fusion
devices. The use of a separate analog ground helps
isolate the analog functionality of the Fusion device
from any digital switching noise. A 0.2 V maximum
differential voltage between GND and GNDA/GNDQ
should apply to system implementation. Note: In FG256,
FG484, and FG676 packages, GNDAQ and GNDA pins are
connected within the package and are labeled as GNDA
pins in the respective package pin assignment tables.
GNDNVM
Ground supply used by the Fusion device's flash memory
block module(s).
GNDOSC
Ground supply for both integrated RC oscillator and
crystal oscillator circuit.
V
A 1.5 V analog power supply input should be used to
provide this input.
CC15A
Ground
Ground (quiet)
Analog Reference Ground
Ground (analog)
Ground (analog quiet)
Flash Memory Ground
Oscillator Ground
Analog Power Supply (1.5 V)
A d v an c ed v1 . 4
V
3.3 V clean analog power supply input for use by the
3.3 V portion of the analog circuitry.
V
This is the –3.3 V output from the voltage converter. A
2.2 µF capacitor must be connected from this pin to
ground.
V
3.3 V clean analog power supply input for use by the
analog charge pump. To avoid high current draw,
V
simultaneously with V
V
1.5 V power supply input used by the Fusion device's
flash memory block module(s). To avoid high current
draw,
simultaneously with V
V
Power supply for both integrated RC oscillator and
crystal oscillator circuit.
V
Supply voltage to the FPGA core, nominally 1.5 V. V
also required for powering the JTAG state machine, in
addition to V
mode in a JTAG chain of interconnected devices, both
V
signals to pass through the Fusion device.
V
Supply voltage to the bank's I/O output buffers and I/O
logic. Bx is the I/O bank number. There are either four
(AFS090 and AFS250) or five (AFS600 and AFS1500) I/O
banks on the Fusion devices plus a dedicated V
Each bank can have a separate V
a bank will run off the same V
1.5 V, 1.8 V, 2.5 V, or 3.3 V, nominal voltage. Unused I/O
banks should have their corresponding V
GND.
V
Supply voltage to analog PLL, nominally 1.5 V, where A
and B refer to the PLL. AFS090 and AFS250 each have a
single PLL. The AFS600 and AFS1500 devices each have
two PLLs. Actel recommends tying V
using proper filtering circuits to decouple V
PLL.
If unused, V
CC33A
CC33N
CC33PMP
CC33PMP
CCNVM
CCOSC
CC
CC
CCI
CCPLA/B
Bx
and V
V
CC
JTAG
CCPLA/B
should
JTAG
should
Actel Fusion Programmable System Chips
must remain powered to allow JTAG
. Even when a Fusion device is in bypass
Analog Power Supply (3.3 V)
Negative 3.3 V Output
Analog Power Supply (3.3 V)
Flash Memory Block Power Supply
(1.5 V)
Oscillator Power Supply (3.3 V)
Core Supply Voltage
I/O Supply Voltage
PLL Supply Voltage
should be tied to GND.
be
CC33A
CCNVM
be
.
powered
.
powered
CCI
CCI
Bx supply. V
connection. All I/Os in
CCPLX
up
up
CCI
CC
before
pins tied to
to V
before
noise from
JTAG
CCI
CC
can be
bank.
2-203
CC
and
or
or
is

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