afs600 Actel Corporation, afs600 Datasheet - Page 55

• Manufacturer Part Number: afs600
• Description: Actel Fusion Programmable System Chips Mixed-signal Family With Optional Arm Support
• Manufacturer: Actel Corporation

When the spare page of a sector is addressed
(SPAREPAGE active), ADDR[11:7] are ignored.
When the Auxiliary block is addressed (AUXBLOCK
active), ADDR[6:2] are ignored.
Note: The spare page of sector 0 is unavailable for any
user data. Writes to this page will return an error, and
reads will return all zeroes.
Data operations are performed in widths of 1 to 4 bytes.
A write to a location in a page that is not already in the
Page Buffer will cause the page to be read from the FB
Array and stored in the Page Buffer. The block that was
addressed during the write will be put into the Block
Buffer, and the data written by WD will overwrite the
data in the Block Buffer. After the data is written to the
Block Buffer, the Block Buffer is then written to the Page
Buffer to keep both buffers in sync. Subsequent writes to
the same block will overwrite the Block Buffer and the
Page Buffer. A write to another block in the page will
cause the addressed block to be loaded from the Page
Buffer, and the write will be performed as described
previously.
The data width can be selected dynamically via the
DATAWIDTH input bus. The truth table for the data
width settings is detailed in
resolvable address is one 8-bit byte. For data widths
greater than 8 bits, the corresponding address bits are
ignored—when DATAWIDTH = 0 (2 bytes), ADDR[0] is
ignored, and when DATAWIDTH = '10' or '11' (4 bytes),
ADDR[1:0] are ignored. Data pins are LSB-oriented and
unused WD data pins must be grounded.
Table 2-21 • Data Width Settings
Flash Memory Block Protection
Page Loss Protection
When the PAGELOSSPROTECT pin is set to logic 1, it
prevents writes to any page other than the current page
in the Page Buffer until the page is either discarded or
programmed.
A write to another page while the current page is Page
Loss Protected will return a STATUS of '11'.
DATAWIDTH[1:0]
00
01
10, 11
Table
Data Width
4 bytes [31:0]
2 byte [15:0]
1 byte [7:0]
2-21. The minimum
A d v an c ed v1 . 4
Overwrite Protection
Any page that is Overwrite Protected will result in the
STATUS being set to '01' when an attempt is made to
either write, program, or erase it. To set the Overwrite
Protection state for a page, set the OVERWRITEPROTECT
pin when a Program operation is undertaken. To clear
the Overwrite Protect state for a given page, an
Unprotect Page operation must be performed on the
page, and then the page must be programmed with the
OVERWRITEPROTECT pin cleared to save the new page.
LOCKREQUEST
The LOCKREQUEST signal is used to give the user
interface control over simultaneous access of the FB from
both the User and JTAG interfaces. When LOCKREQUEST
is asserted, the JTAG interface will hold off any access
attempts until LOCKREQUEST is deasserted.
Flash Memory Block Operations
FB Operation Priority
The FB provides for priority of operations when multiple
actions are requested simultaneously.
the priority order (priority 0 is the highest).
Table 2-22 • FB Operation Priority
Access to the FB is controlled by the BUSY signal. The
BUSY output is synchronous to the CLK signal. FB
operations are only accepted in cycles where BUSY is
logic 0.
Operation
System Initialization
FB Reset
Read
Write
Erase Page
Program
Unprotect Page
Discard Page
Actel Fusion Programmable System Chips
Priority
Table 2-22
0
1
2
3
4
5
6
7
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