afs600 Actel Corporation, afs600 Datasheet - Page 9

• Manufacturer Part Number: afs600
• Description: Actel Fusion Programmable System Chips Mixed-signal Family With Optional Arm Support
• Manufacturer: Actel Corporation

voltage monitor and brownout detection devices from
the PCB design. Flash-based Fusion devices simplify total
system design and reduce cost and design risk, while
increasing system reliability.
Firm Errors
Firm errors occur most commonly when high-energy
neutrons, generated in the upper atmosphere, strike a
configuration cell of an SRAM FPGA. The energy of the
collision can change the state of the configuration cell
and thus change the logic, routing, or I/O behavior in an
unpredictable way. Another source of radiation-induced
firm errors is alpha particles. For an alpha to cause a soft
or firm error, its source must be in very close proximity to
the affected circuit. The alpha source must be in the
package molding compound or in the die itself. While
low-alpha
increasingly, this helps reduce but does not entirely
eliminate alpha-induced firm errors.
Firm errors are impossible to prevent in SRAM FPGAs.
The consequence of this type of error can be a complete
system failure. Firm errors do not occur in Fusion Flash-
based FPGAs. Once it is programmed, the flash cell
configuration element of Fusion FPGAs cannot be
altered by high-energy neutrons and is therefore
immune to errors from them.
Recoverable (or soft) errors occur in the user data SRAMs
of all FPGA devices. These can easily be mitigated by
using error detection and correction (EDAC) circuitry
built into the FPGA fabric.
Low Power
Flash-based Fusion devices exhibit power characteristics
similar to those of an ASIC, making them an ideal choice
for power-sensitive applications. With Fusion devices,
there is no power-on current surge and no high current
transition, both of which occur on many FPGAs.
Fusion
consumption and support both low power standby mode
and very low power sleep mode, offering further power
savings.
Advanced Flash Technology
The Fusion family offers many benefits, including
nonvolatility
advanced flash-based, 130-nm LVCMOS process with
seven layers of metal. Standard CMOS design techniques
are used to implement logic and control functions. The
combination of fine granularity, enhanced flexible
routing resources, and abundant flash switches allows
very high logic utilization (much higher than competing
SRAM
routability or performance. Logic functions within the
device are interconnected through a four-level routing
hierarchy.
technologies)
devices
molding
and
also
reprogrammability
compounds
without
have
low
compromising
are
dynamic
through
being
power
device
A d v an c ed v1 . 4
used
an
Advanced Architecture
The proprietary Fusion architecture provides granularity
comparable to standard-cell ASICs. The Fusion device
consists
architectural features, including the following
on page
• Embedded memories
• Clocking resources
• Digital I/Os with advanced I/O standards
• FPGA VersaTiles
• Analog components
The FPGA core consists of a sea of VersaTiles. Each
VersaTile can be configured as a three-input logic lookup
table (LUT) equivalent or a D-flip-flop or latch (with or
without enable) by programming the appropriate flash
switch interconnections. This versatility allows efficient
use of the FPGA fabric. The VersaTile capability is unique
to the Actel families of flash-based FPGAs. VersaTiles and
larger functions are connected with any of the four
levels of routing hierarchy. Flash switches are distributed
throughout
reconfigurable interconnect programming. Maximum
core utilization is possible for virtually any design.
In addition, extensive on-chip programming circuitry
allows for rapid (3.3 V) single-voltage programming of
Fusion devices via an IEEE 1532 JTAG interface.
Unprecedented Integration
Integrated Analog Blocks and Analog I/Os
Fusion devices offer robust and flexible analog mixed-
signal capability in addition to the high-performance
flash FPGA fabric and flash memory block. The many
built-in analog peripherals include a configurable 32:1
input analog MUX, up to 10 independent MOSFET gate
driver outputs, and a configurable ADC. The ADC
– Flash memory blocks
– FlashROM
– SRAM and FIFO
– PLL and CCC
– RC oscillator
– Crystal oscillator
– No-Glitch MUX (NGMUX)
– ADC
– Analog I/Os supporting voltage, current, and
– 1.5 V on-board voltage regulator
– Real-time counter
1-5):
temperature monitoring
of
the
Actel Fusion Programmable System Chips
several
device
distinct
to
provide
and
programmable
nonvolatile,
(Figure 1-1
1-3