afs600 Actel Corporation, afs600 Datasheet - Page 37

• Manufacturer Part Number: afs600
• Description: Actel Fusion Programmable System Chips Mixed-signal Family With Optional Arm Support
• Manufacturer: Actel Corporation

Table 2-12 • Available Selections of I/O Standards within
Figure 2-20 • Global Buffers with No Programmable Delay
Notes:
1. This is the default macro. For more details, refer to the
2. The BLVDS and M-LVDS standards are supported with
Fusion, IGLOO/e and ProASIC3/E Macro Library
CLKBUF_LVDS.
CLKBUF_LVDS/LVPECL Macro
PADN
PADP
CLKBUF and CLKBUF_LVDS/LVPECL Macros
CLKBUF_LVCMOS33
CLKBUF_LVCMOS18
CLKBUF_LVCMOS15
CLKBUF_LVCMOS5
CLKBUF Macros
CLKBUF_LVPECL
CLKBUF_LVDS
CLKBUF_PCI
Y
Clock Source
2
PAD
CLKBUF Macro
1
Guide.
Y
A d v an c ed v1 . 4
CLKINT Macro
A
Global Buffers with No Programmable
Delays
The CLKBUF and CLKBUF_LVPECL/LVDS macros are
composite macros that include an I/O macro driving a
global buffer, hardwired together
The CLKINT macro provides a global buffer function
driven by the FPGA core.
The CLKBUF, CLKBUF_LVPECL/LVDS, and CLKINT macros
are pass-through clock sources and do not use the PLL or
provide any programmable delay functionality.
Many specific CLKBUF macros support the wide variety of
single-ended and differential I/O standards supported by
Fusion devices. The available CLKBUF macros are
described in the
Library
Y
Guide.
Actel Fusion Programmable System Chips
Fusion, IGLOO/e and ProASIC3/E Macro
Clock Conditioning
None
(Figure
2-20).
Output
GLA
or
GLB
or
GLC
2-23