afs600 Actel Corporation, afs600 Datasheet - Page 43

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afs600

Manufacturer Part Number
afs600
Description
Actel Fusion Programmable System Chips Mixed-signal Family With Optional Arm Support
Manufacturer
Actel Corporation
Datasheet

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No-Glitch MUX (NGMUX)
Positioned downstream from the PLL/CCC blocks, the
NGMUX provides a special switching sequence between
two asynchronous clock domains that prevents generating
any unwanted narrow clock pulses. The NGMUX is used to
switch the source of a global between three different
clock sources. Allowable inputs are either two PLL/CCC
outputs or a PLL/CCC output and a regular net, as shown
Figure 2-24 • NGMUX
Table 2-14 • NGMUX Configuration and Selection Table
GLMUXCFG[1:0]
00
01
W I/O Ring
GLMUXSEL[1:0]
CCC/PLL
X
X
X
X
Clock I/Os
From FPGA Core
Crystal Oscillator
0
1
0
1
RC Oscillator
Selected Input Signal
PLL/
CCC
GLINT
GLINT
A d v an c ed v1 . 4
GLA
GLC
GLA
GLA
GLC
in
determine the source of the CLK inputs (i.e., internal
signal or GLC). These are set by SmartGen during design
but can also be changed by dynamically reconfiguring the
PLL. The GLMUXSEL[1:0] bits control which clock source is
passed through the NGMUX to the global network (GL). See
Table
PWR UP
GLMUXSEL[1:0]
Figure
2-14.
NGMUX
GLMUXCFG[1:0]
2-24. The GLMUXCFG[1:0] configuration bits
Actel Fusion Programmable System Chips
To Clock Rib Driver
GL
2-to-1 GLMUX
2-to-1 GLMUX
MUX Type
2-29

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