afs600 Actel Corporation, afs600 Datasheet - Page 56

• Manufacturer Part Number: afs600
• Description: Actel Fusion Programmable System Chips Mixed-signal Family With Optional Arm Support
• Manufacturer: Actel Corporation

Write Operation
Write operations are initiated with the assertion of the WEN signal.
Write operations.
Figure 2-34 • FB Write Waveform
When a Write operation is initiated to a page that is
currently not in the Page Buffer, the FB control logic will
issue a BUSY signal to the user interface while the page is
loaded from the FB Array into the Page Buffer. (Note:
The number of clock cycles that the BUSY output is
asserted during the load of the Page Buffer is variable.)
After loading the page into the Page Buffer, the
addressed data block is loaded from the Page Buffer into
the Block Buffer. Subsequent writes to the same block of
the page will incur no busy cycles. A write to another
block in the page will assert BUSY for four cycles (five
cycles when PIPE is asserted), to allow the data to be
written to the Page Buffer and have the current block
loaded into the Block Buffer.
Write operations are considered successful as long as the
STATUS output is '00'. A non-zero STATUS indicates that an
error was detected during the operation and the write was
not performed. Note that the STATUS output is "sticky"; it
is unchanged until another operation is started.
Only one word can be written at a time. Write word
width is controlled by the DATAWIDTH bus. Users are
responsible for keeping track of the contents of the Page
Buffer and when to program it to the array. Just like a
regular RAM, writing to random addresses is possible.
Users can write into the Page Buffer in any order but will
incur additional BUSY cycles. It is not necessary to modify
the entire Page Buffer before saving it to nonvolatile
memory.
Write errors include the following:
2 -4 2
Actel Fusion Programmable System Chips
1. Attempting to write a page that is Overwrite
PAGELOSSPROTECT
Protected
performed.
DATAWIDTH[1:0]
STATUS[1:0]
ADDR[17:0]
WD[31:0]
BUSY
WEN
(STATUS = '01').
CLK
D0
A0
The
write
is
D1
A1
A d v a n c e d v 1 . 4
not
Program Operation
A Program operation is initiated by asserting the
PROGRAM signal on the interface. Program operations
save the contents of the Page Buffer to the FB Array. Due
to the technologies inherent in the FB, a program
operation is a time consuming operation (~8 ms). While
the FB is writing the data to the array, the BUSY signal
will be asserted.
During a Program operation, the sector and page
addresses on ADDR are compared with the stored
address for the page (and sector) in the Page Buffer. If
there is a mismatch between the two addresses, the
Program operation will be aborted and an error will be
reported on the STATUS output.
It is possible to write the Page Buffer to a different page
in memory. When asserting the PROGRAM pin, if
OVERWRITEPAGE is asserted as well, the FB will write the
contents of the Page Buffer to the sector and page
designated on the ADDR inputs if the destination page is
not Overwrite Protected.
A Program operation can be utilized to either modify the
contents of the page in the flash memory block or change
the
OVERWRITEPROTECT bit on the interface while asserting
the PROGRAM pin will put the page addressed into
Overwrite Protect Mode. Overwrite Protect Mode
safeguards a page from being inadvertently overwritten
during subsequent Program or Erase operations.
S0
2. Attempting to write to a page that is not in the
Page Buffer when Page Loss Protection is enabled
(STATUS = '11'). The write is not performed.
protections
S1
Figure 2-34 on page 2-42
D2
A2
S2
D3
A3
S3
A4
D4
for
the
A5
D5
illustrates the multiple
page.
S4
Setting
S5
D6
A6
S6
the