tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 104

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
8 TMUX Registers
Table 107. TMUX_THS_TOH_CTL, Transmit High-speed Control Parameters (R/W) (continued)
104
Address
0x40035
Bit
6
5
4
3
2
1
0
7
TMUX_THSLREIINH Transmit Line REI Inhibit. Control bit, when set to a logic 1,
TMUX_THSLAISINS Transmit High-speed Line AIS Insertion. Control bit, when
TMUX_THSAPSINS Transmit APS Value Insert (Control). Control bit, when set to
TMUX_THSK2INS
TMUX_THSS1INS
TMUX_THSF1INS
TMUX_THSZ0INS
TMUX_THSJ0INS
(continued)
Name
disables hardware insertion of line REI (B2 errors) in the outgo-
ing STM-1 (AU-4) frame M1 byte; a logic 0 enables hardware
insertion of line REI.
set to a logic 1, causes line AIS to be inserted into the outgoing
STS-3/STM-1 (AU-4) signal; otherwise, line AIS is not sent.
a logic 1, inserts the value in TMUX_TAPSINS[12:0]
(Table
3/STM-1 (AU-4) frame; a logic 0 inserts the default value based
on SMPR_OH_DEFLT
Transmit K2[2:0] Insert (Control). Control bit, when set to a
logic 1, inserts the value in TMUX_TK2INS[2:0]
into the outgoing K2 byte in the STS-3/STM-1 (AU-4) frame; a
logic 0 inserts the default value based on SMPR_OH_DEFLT.
Transmit S1 Insert (Control). Control bit, when set to a
logic 1, inserts the value in TMUX_TS1INS[7:0]
into the outgoing S1 byte in the STS-3/STM-1 (AU-4) frame; a
logic 0 allows insertion from the TTOAC channel or a default
value.
Transmit F1 Insert (Control). Control bit, when set to a logic
1, inserts the value in TMUX_TF1INS[7:0]
outgoing S1 byte in the STS-3/STM-1 (AU-4) frame; a logic 0
allows insertion from the TTOAC channel or a default value.
Transmit Z0-2 and Z0-3 Insert (Control). Control bit, when
set to a logic 1, inserts the values in TMUX_TZ02INS[7:0]
(Table
going Z0-2 and Z0-3 bytes in the STS-3/STM-1 (AU-4) frame; a
logic 0 inserts the default value based on SMPR_OH_DEFLT.
Transmit J0 Insert (Control). Control bit, when set to a logic
1, inserts the 16-byte sequence TMUX_TJ0DINS[16—1][7:0]
(Table
logic 0 inserts the default value based on SMPR_OH_DEFLT.
113) into the outgoing K1 and K2[7:3] bytes in the STS-
111) and TMUX_TZ03INS[7:0]
133) into the outgoing STS-3/STM-1 (AU-4) frame; a
(Table
Function
67).
(Table
(Table
111) into the out-
(Table
(Table
112) into the
Agere Systems Inc.
113)
112)
May 2001
Default
Reset
0
0
0
0
0
0
0
0