tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 552

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
22 Cross Connect (XC) Block Functional Description
22.6 Notes on the DS1 Cross Connect
22.6.1 DS1/E1 TPG
DS1 test signals are available at any XC1 output channel by specifying value 000 in the SOURCE_ID field. The
CHANNEL_ID field is set to zero for standard DS1 test-data patterns and one for DS1 (framed) idle data.
E1 test signals are available at any XC1 output channel by specifying value 0 in the SOURCE_ID field. The
CHANNEL_ID field is set to two for standard E1 test-data patterns.
22.6.2 M13 DS1/E1 Interface
The user configures the M13 DS1(E1) connections from the crosspoint by loading the appropriate SOURCE_IDs
into the M13 crosspoint configuration registers.
The user may connect any valid DS1 or E1 (XC1 input) signal bundle from the framer, VT mapper, external I/O,
TPG, or DJA to any M13 input configured as a DS1 or E1 input. Each of the 28 possible M13 (DS1) or 21 possible
E1(J1) inputs may be assigned a XC1 source ID for the corresponding XC_MDS1DATA[1—28][7:0] (
byte in the XC_M13_SRC[1—14] configuration registers. Since register information is not shared between the M13
block and the XC1 block, the user is responsible for correct programming of the crosspoint by ensuring the consis-
tency of the designation of M13 vs. M12/M23 channels, as well as coordinating the designation of DS1 vs. E1(J1)
channels.
The cross connect block automatically supports independent signal paths for alarm indicator signal (AIS) on chan-
nels between the M13 and the framer.
The XC1 supports a mode where the M13 block provides the DS1/E1 clock out for data to be multiplexed in from
the external I/O device pins as depicted in
ister bit XC_DS1ALCOEN =
ERXCLK[1—29] device pin by programming the corresponding
XC_ALCO[1—29][7:0] byte in registers XC_ALCO_SRC[1—15] with the M13 SOURCE_ID = 011 and the channel
ID of the selected M13 channel. The LINERXCLK[1—29] clock output is used to clock in data from the associated
LINERXDATA[1—29] device pin and a stuff request input from the LINERXSYNC[1—29] device pin. In this mode,
the M12 stuff time is determined externally.
552
REGISTER BIT XC_DS1ALCOEN
0 = DS1 EXTERNAL CLOCK IN
1 = DS1 M13 DEMUX CLOCK OUT
EXTERNAL I/O
LINERXSYNC
LINERXDATA
LINERXCLK
1(Table
462). In this mode, the appropriate DS1 or E1 level clock is routed to the LIN-
Figure 84. DS1E1 External I/O to M13
Figure 84 on page
XC_MDS1DATA[1—28][7:0]
XC
XC1
CHANNEL_ID FROM 1 TO 29
XC_ALCO[1—29][7:0]
BUNDLED SIGNALS
SOURCE_ID = 011
EXT I/O—SOURCE_ID = 001
CHANNEL_ID = 1 TO 29
—PIN SELECT
552. DS1/E1 low clock out mode is enabled with reg-
(continued)
M13_DS1_DATA
M13_DS1_CLOCK
M13_DS1_STUFF
REQUEST
M13_DS1_CLOCK
(DEMUX FROM M13)
M13
Agere Systems Inc.
Table
May 2001
453)
5-9183(F)r.2