tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 274

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
12 28-Channel Framer Registers
Table 381. Performance Monitor Per Link Register Address Indexing
Read: for link 1 on the receive path, the hexidecimal digit L is 0x0 and the hexidecimal digit P is 0x2.
Table 382. FRM_PMLR1, Performance Monitor Link Register 1 (R/W)
* See
Table 383. FRM_PMLR2, Performance Monitor Link Register 2 (R/W)
* See
274
Address*
Address*
0x8LP80
0x8LP81
Link
—
—
1
2
3
4
5
6
7
1
2
3
4
5
6
7
Table 381
Table 381
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
15:0
15:0
—
—
for values of L and P.
for values of L and P .
L
Bit
Bit
FRM_PM_IM4[15:0]
FRM_PM_IM5[15:0]
0xC
0xD
0xA
0xE
0xB
0xF
0x2
0x4
0x6
0x8
0x3
0x5
0x7
0x9
—
—
P
Name
Name
Link
10
11
12
13
14
15
10
11
12
13
14
15
8
9
8
9
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
L
Transmit Path (P is odd))
Performance Monitoring Register FRM_PMLR4 Inter-
rupt Mask. A 1 masks the corresponding status bit in the
interrupt status registers
interrupt. A 0 allows an interrupt to be generated.
Performance Monitor Register FRM_PMLR5 Interrupt
Mask. A 1 masks the corresponding status bit in interrupt
status registers
0 allows an interrupt to be generated.
Receive Path (P is even)
(continued)
0xA
0xC
0xE
0xB
0xD
0x0
0x2
0x4
0x6
0x8
0x1
0x3
0x5
0x7
0x9
0xF
P
Link
(Table
16
17
18
19
20
21
22
23
16
17
18
19
20
21
22
23
386) from generating an interrupt. A
Function
Function
(Table
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
L
386) from generating an
0xA
0xC
0xE
0xB
0xD
0xF
0x0
0x2
0x4
0x6
0x8
0x1
0x3
0x5
0x7
0x9
P
Link
24
25
26
27
28
24
25
26
27
28
—
—
—
—
—
—
Agere Systems Inc.
0x3
0x3
0x3
0x3
0x3
0x3
0x3
0x3
0x3
0x3
—
—
—
—
—
—
L
May 2001
0xFFFF
0xFFFF
Default
Default
Reset
Reset
0x0
0x2
0x4
0x6
0x8
0x1
0x3
0x5
0x7
0x9
—
—
—
—
—
—
P