tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 442

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
19 VT/TU Mapper Functional Description
19.14.2 Transmit Elastic Store (TES)
The TES logic block (in
DS1/E1 or VT1.5/VT2 signals to the local STS-1/STS-3 clock.
The TES logic block has programmable stuffing thresholds. The value programmed in the VT_HIGH_THRES[6:0]
(Table
negative justification. The recommended values for nontributary loopback (VT_LB_SEL[1—28] = 0
VT_HIGH_THRES[6:0] = 0x28 and VT_LOW_THRES[6:0] = 0x27. Otherwise (VT_LB_SEL[1—28] = 1), the rec-
ommended values are VT_HIGH_THRES[6:0] = 0x05 and VT_LOW_THRES[6:0] = 0x04.
The TES logic block monitors for elastic store overflow conditions and reports with bit VT_TX_ESOVFL_E[1—28]
(Table
generate and interrupt.
19.14.3 Virtual Tributary Generator (VTGEN)
The VTGEN logic block (in
inputs to the appropriate VT/TU structure. This includes VT/TU pointer generation, positive/negative stuffing,
VT/TU overhead generation/insertion and DS1/E1 data insertion. The following features will be implemented:
19.14.4 Pointer Generation
442
This logic block will support the following modes of operation:
— Asynchronous, bit synchronous, and byte synchronous mapping from loopback VT1.5/VT2 input.
This logic block will support the following modes of operation:
— Asynchronous
— Byte synchronous
— Bit synchronous
The pointer generator will support the following features when operating in asynchronous or bit synchronous
mode:
The pointer generation will support the following features when operating in byte synchronous mode:
— Asynchronous, bit synchronous, and byte synchronous mapping from DS1/E1 input.
— If transmit AIS-V is not requested, the following requirements apply:
— If transmit AIS-V is not requested, the following requirements apply:
1. A fixed pointer value of decimal 78 is generated for VT1.5/TU-11 mappings.
2. A fixed pointer value of decimal 105 is generated for VT2/TU-12 mappings.
3. The VT size field will be set to binary 11 for VT1.5/TU-11 mappings.
4. The VT size field will be set to binary 10 for VT2/TU-12 mappings.
5. The new data flag (NDF) set to binary 0110 for VT1.5/VT2 mappings.
6. V3 and V4 is set to the selected overhead default (SMPR_OH_DEFLT
1. The pointer value is generated based on the location of the incoming frame sync for VT1.5/VT2 mappings.
2. The VT size field is set to 11 for VT1.5/TU-11 mappings.
3. The VT size field is set to 10 for VT2/TU-12 mappings.
4. The new data flag (NDF) is set to 0110 for normal VT1.5/VT2 mappings. If a NDF is requested, the NDF will
face block) for all mappings:
be set to 1001 (binary).
— If transmit AIS-V is requested, V1~V4 will be forced to 0xFF.
— Bit stuffing, using the C and S bits, will be performed based on the fullness of the elastic store.
210) controls positive justification. The value programmed in the VT_LOW_THRES[6:0]
171). Unless the VT_TX_ESOVFL_M[1—28]
Figure 39 on pag
Figure 39 on page429
e429) will perform all functions necessary to synchronize the incoming
) performs all functions necessary to map all possible DS1/E1
(Table
(continued)
175) mask bit is set, VT_TX_ESOVFL_E[1—28] = 1 will
(Table
67) in the microprocessor inter-
(Table
Agere Systems Inc.
(Table
210) controls
May 2001
198)) are