tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 239

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
12 28-Channel Framer Registers
Contents
12 28-Channel Framer Registers ........................................................................................................................ 239
Tables
Table 301. FRM_SFGR1, Superframer Global Register 1 (R/W) ........................................................................ 243
Table 302. FRM_SFGR2, Superframer Global Register 2 (R/W) ........................................................................ 244
Table 303. FRM_SFGR3, Superframer Global Register 3 (RO) ......................................................................... 245
Table 304. FRM_SFGSR4, Superframer Global Register 4 (R/W) ..................................................................... 245
Table 305. FRM_FGR1, Framer Global Register 1 (R/W) .................................................................................. 245
Table 306. FRM_FGR2, Framer Global Register 2 (R/W) .................................................................................. 246
Table 307. FRM_FGR3, Framer Global Register 3 (R/W) .................................................................................. 246
Table 308. FRM_FGR4, Framer Global Register 4 (COR) ................................................................................. 246
Table 309. FRM_FGR5, Framer Global Register 5 (COR) ................................................................................. 247
Table 310. FRM_PMGR1_B, Performance Monitor Global Register 1_B (R/W) ................................................ 247
Table 311. FRM_PMGR1, Performance Monitor Global Register 1 (COR) ........................................................ 247
Table 312. FRM_PMGR2, Performance Monitor Global Register 2 (COR) ........................................................ 248
Table 313. FRM_PMGR3, Performance Monitor Global Register 3 (R/W) ......................................................... 248
Table 314. FRM_PMGR4, Performance Monitor Global Register 4 (R/W) ......................................................... 249
Table 315. FRM_PMGR5, Performance Monitor Global Register 5—PMGR5 (R/W) ......................................... 249
Table 316. FRM_PMGR6, Performance Monitor Global Register 6 (R/W) ......................................................... 249
Table 317. FRM_PMGR7, Performance Monitor Global Register 7 (R/W) ......................................................... 249
Table 318. FRM_PMGR8, Performance Monitor Global Register 8 (R/W) ......................................................... 250
Table 319. FRM_PMGR9, Performance Monitor Global Register 9 (R/W) ......................................................... 250
Table 320. FRM_PMGR10, Performance Monitor Global Register 10 (R/W) ..................................................... 250
Table 321. FRM_PMGR11, Performance Monitor Global Register 11 (R/W) ..................................................... 250
Table 322. FRM_PMGR12, Performance Monitor Global Register 12 (R/W) ..................................................... 251
Table 323. FRM_PMGR13, Performance Monitor Global Register 13 (R/W) ..................................................... 251
Table 324. FRM_PMGR14, Performance Monitor Global Register 14 (R/W) ..................................................... 252
Agere Systems Inc.
12.1 Framer Global Register Descriptions ..................................................................................................... 243
12.2 Arbiter (Framer) Global Registers .......................................................................................................... 245
12.3 Performance Monitor Global Registers .................................................................................................. 247
12.4 HDLC Global Configuration and Status Registers .................................................................................. 253
12.5 System Interface Global Registers ......................................................................................................... 257
12.6 Signaling Global Registers ..................................................................................................................... 262
12.7 Frame Formatter (Transmit Framer) Global Register ............................................................................. 266
12.8 Facility Data Link Global Registers ......................................................................................................... 267
12.9 Super Mapper Framer Per Link Configuration and Status Registers ..................................................... 267
12.10 Performance Monitor Per Link Registers .............................................................................................. 273
12.11 Receive Facility Data Link Configuration and Status Registers ........................................................... 288
12.12 Transmit Facility Data Link Configuration and Status Registers .......................................................... 290
12.13 System Interface, Arbiter, and Frame Formatter Mapping ................................................................... 292
12.14 System Interface Per Link Registers .................................................................................................... 293
12.15 Arbiter Framer Per Link Registers ........................................................................................................ 295
12.16 Frame Formatter Per Link Registers .................................................................................................... 300
12.17 Line Decoder/Encoder Per Link Registers ........................................................................................... 302
12.18 Line Encoder/Decoder Per Link Registers ........................................................................................... 303
12.19 HDLC Per Channel Configuration and Status Registers ...................................................................... 304
12.20 28-Channel Framer Block Register Map .............................................................................................. 311
12.9.1 Signaling Per Link Registers ........................................................................................................ 267
Table of Contents
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
TMXF28155/51 Super Mapper
Page
Page
239