tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 201

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
11 M13/M23 MUX/DeMUX Registers
Table 217. M13_DELTA4, Delta (RO)
Agere Systems Inc.
Address
0x10007 15:8
Bit
7
6
5
4
3
2
1
0
M13_RFEAC_ALM_INT This bit indicates that a new DS3 FEAC alarm codeword has
M13_RDL_FIFO_AFD
M13_RFEAC_LB_INT
M13_TDL_BUF1_INT
M13_TDL_BUF0_INT
M13_RDL_FRM_INT
M13_TFEAC_DONE
M13_TDL_DONE
Name
—
Reserved.
This bit is set when the M13 completes transmission of a
sequence of FEAC control code. It can be programmed to
be either clear on read (COR) or clear on write (COW), and it
is not set to 1 again until the event reoccurs.
This bit is set when the M13 completes transmission of a
data-link frame. It can be programmed to be either clear on
read (COR) or clear on write (COW), and it is not set to 1
again until the event reoccurs.
This bit is set when the device completes transmission of
M13_TDL_1DATA63[7:0]
1). It can be programmed to be either clear on read (COR) or
clear on write (COW), and it is not set to 1 again until the
event reoccurs.
This bit is set when the device completes transmission of
M13_TDL_0DATA63[7:0]
0). It can be programmed to be either clear on read (COR) or
clear on write (COW), and it is not set to 1 again until the
event reoccurs.
This delta bit is set if M13_RDL_FIFO_AF
changes state. It can be programmed to be either clear on
read (COR) or clear on write (COW), and it is not set to 1
again until another state transition occurs.
This bit indicates that a new data-link frame closing flag or
an abort byte has been received. It can be programmed to
be either clear on read (COR) or clear on write (COW), and it
is not set to 1 again until the event reoccurs.
been received. The new codeword is available in register
M13_RFEAC_CODE_R
words, the appropriate M13_DS1_FEAC_LB_DETx
(Table
isters 0x2F through 0x32 will be set or cleared. It can be pro-
grammed to be either clear on read (COR) or clear on write
(COW), and it is not set to 1 again until the event reoccurs.
This bit indicates that a new DS3 FEAC loopback codeword
has been received. The new codeword is available in regis-
ter M13_RFEAC_CODE_R. For loopback codewords, the
appropriate M13_DS1_FEAC_LB_DETx and
M13_DS3_FLB_DET bits will be set or cleared. It can be
programmed to be either clear on read (COR) or clear on
write (COW), and it is not set to 1 again until the event reoc-
curs.
(continued)
251) and M13_DS3_FLB_DET
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
(Table
Function
(Table
(Table
252). For loopback code-
299) (the last byte of buffer
298) (the last byte of buffer
TMXF28155/51 Super Mapper
(Table
(Table
251) bits in reg-
225)
Default
Reset
0x00
0
0
0
0
0
0
0
0
201