ST72F324BJ6B6 STMicroelectronics, ST72F324BJ6B6 Datasheet - Page 168

• Manufacturer Part Number: ST72F324BJ6B6
• Description: MCU 8BIT 32KB FLASH/ROM 42-SDIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BJ6B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-SDIP (0.600", 15.24mm)
• Controller Family/series: ST7
• No. Of I/o's: 32
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• No. Of Pwm Channels: 3
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5589-5

Electrical characteristics
Figure 83. SPI master timing diagram
12.13
Table 112. 10-bit ADC characteristics
168/193
Symbol
V
C
R
C
f
V
f
AREF
ADC
I
AIN
ADC
AIN
lkg
AIN
AIN
MISO
MOSI
ADC clock frequency
Analog reference voltage
Conversion voltage range
Input leakage current for analog
input
External input impedance
External capacitor on analog input
Variation freq. of analog input signal
Internal sample and hold capacitor
SS
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
INPUT
OUTPUT
INPUT
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
10-bit ADC characteristics
Subject to general operating conditions for V
(2)
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
See note 2
Parameter
t
su(MI)
(1)
MSB OUT
t
MSB IN
h(MI)
(1)
t
c(SCK)
0.7*V
-40 °C < T
Other T
t
t
t
v(MO)
w(SCKH)
w(SCKL)
DD
Conditions
A
BIT6 OUT
< V
ranges
BIT6 IN
A
< + 85 °C
AREF
DD
DD
, f
< V
and 0.7xV
CPU
DD
, and T
t
h(MO)
DD
V
Min
.
0.4
3.8
A
SSA
unless otherwise specified.
t
t
r(SCK)
f(SCK)
LSB OUT
Typ
LSB IN
12
84
figures
V
±250
Max
V
See
AREF
±1
85
ST72324Bxx
2
DD
and
See note 2
MHz
Unit
nA
µA
Hz
kΩ
pF
pF
V