ST72F324BJ6B6 STMicroelectronics, ST72F324BJ6B6 Datasheet - Page 73
![MCU 8BIT 32KB FLASH/ROM 42-SDIP](/photos/7/4/70413/497-42-sdip__600_mil__series_sml.jpg)
ST72F324BJ6B6
Manufacturer Part Number
ST72F324BJ6B6
Description
MCU 8BIT 32KB FLASH/ROM 42-SDIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F324BJ6B6.pdf
(193 pages)
Specifications of ST72F324BJ6B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SDIP (0.600", 15.24mm)
Controller Family/series
ST7
No. Of I/o's
32
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
No. Of Pwm Channels
3
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-5589-5
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ST72324Bxx
MCC beep control register (MCCBCR)
Table 41.
Table 42.
Table 43.
MCCBCR
7:2
1:0 BC[1:0]
Bit
Address
002Ch
002Dh
002Bh
(Hex.)
7
BC1
Name
0
0
1
1
-
Register label
SICSR
Reset value
MCCSR
Reset value
MCCBCR
Reset value
MCCBCR register description
Beep frequency selection
Main clock controller register map and reset values
Reserved, must be kept cleared
Beep Control
These 2 bits select the PF1 pin beep capability (see
signal is available in Active-halt mode but has to be disabled to reduce the
consumption.
6
BC0
0
1
0
1
MCO
5
7
0
0
0
Reserved
-
AVDIE
CP1
6
0
0
0
4
~500 Hz
~1 kHz
~2 kHz
AVDF
CP0
5
0
0
0
Beep mode with f
Function
LVDRF
3
SMS
4
0
0
x
Off
TB1
3
0
0
0
2
Table
OSC2
Reset value: 0000 0000 (00h)
= 8 MHz
TB0
42). The beep output
~50% duty cycle
2
0
0
0
On-chip peripherals
Beep signal
Output
1
BC1
OIE
BC[1:0]
1
0
0
0
R/W
WDGRF
BC0
0
OIF
73/193
0
0
0
x
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