ST72F324BJ6B6 STMicroelectronics, ST72F324BJ6B6 Datasheet - Page 32

MCU 8BIT 32KB FLASH/ROM 42-SDIP

ST72F324BJ6B6

Manufacturer Part Number
ST72F324BJ6B6
Description
MCU 8BIT 32KB FLASH/ROM 42-SDIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F324BJ6B6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SDIP (0.600", 15.24mm)
Controller Family/series
ST7
No. Of I/o's
32
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
No. Of Pwm Channels
3
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-5589-5
Supply, reset and clock management
Figure 12. Clock, reset and supply block diagram
6.3
Caution:
6.3.1
32/193
RESET
OSC2
OSC1
V
V
DD
SS
Multi-oscillator (MO)
The main clock of the ST7 can be generated by three different source types coming from the
multi-oscillator block:
Each oscillator is optimized for a given frequency range in terms of consumption and is
selectable through the option byte. The associated hardware configurations are shown in
Table
The OSC1 and/or OSC2 pins must not be left unconnected. For the purposes of Failure
Mode and Effect Analysis, it should be noted that if the OSC1 and/or OSC2 pins are left
unconnected, the ST7 main oscillator may start and, in this configuration, could generate an
f
unsafe/undefined state. The product behavior must therefore be considered undefined when
the OSC pins are left unconnected.
External clock source
In this external clock mode, a clock signal (square, sinus or triangle) with ~50% duty cycle
has to drive the OSC1 pin while the OSC2 pin is tied to ground.
OSC
an external source
4 crystal or ceramic resonator oscillators
an internal high frequency RC oscillator
clock frequency in excess of the allowed maximum (> 16 MHz.), putting the ST7 in an
9. Refer to the electrical characteristics section for more details.
Reset sequence
oscillator
Multi-
(MO)
manager
(RSM)
f
OSC
(option)
PLL
SICSR
0
System integrity management
AVD AVD LVD
IE
AVD interrupt request
F
Auxiliary voltage
Low voltage
RF
detector
detector
(AVD)
(LVD)
0
0
0
WDG
f
RF
OSC2
Clock (MCC/RTC)
with Real-time
timer (WDG)
Main Clock
Watchdog
Controller
ST72324Bxx
f
CPU

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