ST72F324BJ6B6 STMicroelectronics, ST72F324BJ6B6 Datasheet - Page 17

MCU 8BIT 32KB FLASH/ROM 42-SDIP

ST72F324BJ6B6

Manufacturer Part Number
ST72F324BJ6B6
Description
MCU 8BIT 32KB FLASH/ROM 42-SDIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F324BJ6B6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SDIP (0.600", 15.24mm)
Controller Family/series
ST7
No. Of I/o's
32
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
No. Of Pwm Channels
3
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-5589-5
ST72324Bxx
Table 2.
10 5
11 6
12 7
13 8
14 9
15 10
16 11
17 12
18 13
19 14
20 15
6
7
8
9
Pin No.
1
2
3
4
30
31
32
3
4
1
2
5
6
7
10
Legend / Abbreviations for
Device pin description
a. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column
b. In the open drain output column, ‘T’ defines a true open drain I/O (P-Buffer and protection diode to V
1 PB4 (HS)
2 PD0/AIN0
3 PD1/AIN1
4 V
5 V
6 PF0/MCO/AIN8 I/O C
7 PF1 (HS)/BEEP I/O C
8
9
(wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the
configuration is floating interrupt input.
implemented). See
PD2/AIN2
PD3/AIN3
PD4/AIN4
PD5/AIN5
PF2 (HS)
PF4/OCMP1_A/
AIN10
PF6
(HS)/ICAP1_A
PF7 (HS)/
EXTCLK_A
AREF
Type:
Input level:
In/Output level: C = CMOS 0.3V
Output level:
Port and control configuration:
SSA
Pin Name
(1)
(1)
Input:
Output: OD = open drain
float = floating, wpu = weak pull-up, int = interrupt
Section 9: I/O ports
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
S
S
I = input, O = output, S = supply
A = Dedicated analog input
C
HS = 20 mA high sink (on N-buffer only)
T
Level
T
T
T
T
T
T
T
T
T
T
T
T
T
= CMOS 0.3V
Table 2:
HS
HS
HS
HS
HS
X
X
X
X
X
X
X
X
X
X
X
X
X
and
(b)
X
X
X
X
X
X
X
X
X
, PP = push-pull
Input
DD
Section 12.9: I/O port pin characteristics
ei3
ei1
ei1
ei1
DD
/0.7
/0.7
Port
DD
X
X
X
X
X
X
X
X
DD
Output
X
X
X
X
X
X
X
X
X
X
X
X
X
with input trigger
X
X
X
X
X
X
X
X
X
X
X
X
X
Analog Reference Voltage for ADC
Analog Ground Voltage
Port F0
Port F1
Port F2
Port F4
Port F6
Port F7
function
Port B4
Port D0
Port D1
Port D2
Port D3
Port D4
Port D5
reset)
(after
Main
ADC Analog Input 5
Main clock
out (f
Beep signal output
Timer A
Output
Compare 1
Timer A Input Capture 1
Timer A External Clock
Source
(a)
, ana = analog ports
Alternate Function
ADC Analog Input 0
ADC Analog Input 1
ADC Analog Input 2
ADC Analog Input 3
ADC Analog Input 4
for more details.
CPU
Pin description
)
ADC
Analog
Input 8
ADC
Analog
Input 10
DD
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are not

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