ST72F324BJ6B6 STMicroelectronics, ST72F324BJ6B6 Datasheet - Page 180

• Manufacturer Part Number: ST72F324BJ6B6
• Description: MCU 8BIT 32KB FLASH/ROM 42-SDIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BJ6B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-SDIP (0.600", 15.24mm)
• Controller Family/series: ST7
• No. Of I/o's: 32
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• No. Of Pwm Channels: 3
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5589-5

Device configuration and ordering information
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Table 120. Option byte 0 bit description (continued)
Table 121. Option byte 1 bit description
OPT5:4
OPT3:1 OSCRANGE[2:0]
OPT0
OPT7
OPT6
Bit
Bit
OSCTYPE[1:0]
FMP_R
Name
RSTC
Name
PKG1
Pin package selection bit
Reset clock cycle selection
Oscillator type
Oscillator range
Flash memory readout protection
This option bit selects the package (see
Note: On the chip, each I/O port has eight pads. Pads that are not
bonded to external pins are in input pull-up configuration after reset.
The configuration of these pads must be kept at reset state to avoid
added current consumption.
This option bit selects the number of CPU cycles applied during the
reset phase and when exiting Halt mode. For resonator oscillators, it
is advised to select 4096 due to the long crystal stabilization time.
0: Reset phase with 4096 CPU cycles
1: Reset phase with 256 CPU cycles
These option bits select the ST7 main clock source type.
00: Clock source = Resonator oscillator
01: Reserved
10: Clock source = Internal RC oscillator
11: Clock source = External source
When the resonator oscillator type is selected, these option bits select
the resonator oscillator current source corresponding to the frequency
range of the used resonator. When the external clock source is
selected, these bits are set to medium power (2 ~ 4 MHz)
000: Typ. frequency range (LP) = 1 ~ 2 MHz
001: Typ. frequency range (MP) = 2 ~ 4 MHz
010: Typ. frequency range (MS) = 4 ~ 8 MHz
011: Typ. frequency range (HS) = 8 ~ 16 MHz
Readout protection, when selected, provides a protection against
program memory content extraction and against write access to Flash
memory.
Erasing the option bytes when the FMP_R option is selected causes
the whole user memory to be erased first, afterwhich the device can
be reprogrammed. Refer to
Flash Programming Reference Manual for more details.
0: Readout protection enabled
1: Readout protection disabled
Section 4.3.1 on page 24
Function
Function
Table
122).
and the ST7
ST72324Bxx
.