MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 134

IC MCU 25MHZ ETHERNET/PHY 80TQFP

MC9S12NE64VTU

Manufacturer Part Number
MC9S12NE64VTU
Description
IC MCU 25MHZ ETHERNET/PHY 80TQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64VTU

Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Chapter 3 Port Integration Module (PIM9NE64V1)
3.3.2.6.7
Read:Anytime.
Write:Anytime.
This register configures the output pins as wired-or. If enabled the output is driven active low only
(open-drain). A logic level of “1” is not driven. This bit has no effect on pins used as inputs.
WOML[6:0] — Wired-Or Mode Port L
3.4
Each pin can act as general-purpose I/O. In addition the pin can act as an output from a peripheral module
or an input to a peripheral module.
A set of configuration registers is common to all ports. All registers can be written at any time, however a
specific configuration might not become active.
Example:
Selecting a pull-up resistor. This resistor does not become active while the port is used as a push-pull
output.
3.4.1
This register holds the value driven out to the pin if the port is used as a general-purpose I/O.
Writing to this register has only an effect on the pin if the port is used as general-purpose output. When
reading this address, the value of the pins are returned if the data direction register bits are set to 0.
If the data direction register bits are set to 1, the contents of the I/O register is returned. This is independent
of any other configuration
3.4.2
This is a read-only register and always returns the value of the pin
Data direction register
134
1 = Open-drain mode enabled for output buffers.
0 = Open-drain mode disabled for output buffers.
Address Offset: $__2E
Reset:
Read:
Write:
Functional Description
I/O Register
Input Register
Wired-Or Mode Register (WOML)
Bit 7
0
= Reserved or unimplemented
(Figure
Figure 3-45. Port L Wired-Or Mode Register (WOML)
WOML6
6
0
3-46).
WOML5
MC9S12NE64 Data Sheet, Rev. 1.1
5
0
WOML4
4
0
WOML3
3
0
(Figure
WOML2
2
0
3-46).
WOML1
1
0
Freescale Semiconductor
WOML0
Bit 0
0

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