MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 321

• Manufacturer Part Number: MC9S12NE64VTU
• Description: IC MCU 25MHZ ETHERNET/PHY 80TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTU

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ECIF — Excessive Collision Interrupt Flag
TXCIF — Frame Transmission Complete Interrupt Flag
11.3.2.8 Interrupt Mask (IMASK)
The interrupt mask register provides control over which possible interrupt events are allowed to generate
an interrupt. If the corresponding bits in both IEVENT and IMASK registers are set, an interrupt is
generated and remains active until a 1 is written to the IEVENT bit or a 0 is written to the IMASK bit.
Read: Anytime.
Write: Anytime.
RFCIE — Receive Flow Control Interrupt Enable
BREIE — Babbling Receive Error Interrupt Enable
RXEIE — Receive Error Interrupt Enable
RXAOIE — Receive Buffer A Overrun Interrupt Enable
RXBOIE — Receive Buffer B Overrun Interrupt Enable
Freescale Semiconductor
Module Base + $C
RESET:
W
R
This flag is set if the total number of collisions has exceeded the maximum retransmission count of 15
while in half-duplex mode. The frame is discarded and another START command must be invoked to
commence a new transmission. If not masked (ECIE is set), an excessive collision interrupt is pending
while this flag is set.
This flag is set when a transmit frame has been completed. If not masked (TXCIE is set), a frame
transmission complete interrupt is pending while this flag is set.
1 = Number of collisions exceeds 15.
0 = Number of collisions is 15 or less.
1 = Frame transmission has been completed.
0 = Frame transmission has not been confirmed.
1 = A receive flow control event causes a receive flow control interrupt request.
0 = No interrupt request is generated by this event.
1 = A babbling receive error event causes a babbling receive error interrupt request.
0 = No interrupt request is generated by this event.
1 = A receive error event causes a receive error interrupt request.
0 = No interrupt request is generated by this event.
1 = A receive buffer A overrun event causes a receive buffer A overrun interrupt request.
0 = No interrupt request is generated by this event.
1 = A receive buffer B overrun event causes a receive buffer B overrun interrupt request.
RFCIE
15
0
= Unimplemented or Reserved
14
0
0
BREIE
13
0
RXEIE RXAOIE RXBOIE RXACIE RXBCIE MMCIE
12
0
11
0
Figure 11-9. Interrupt Mask (IMASK)
MC9S12NE64 Data Sheet, Rev. 1.1
10
0
9
0
8
0
7
0
6
0
0
LCIE
5
0
Memory Map and Register Descriptions
ECIE
4
0
3
0
0
2
0
0
TXCIE
1
0
0
0
0
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