MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 252

• Manufacturer Part Number: MC912DG128ACPV
• Description: IC MCU 128K FLASH 8MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912DG128ACPV

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

OC7M — Output Compare 7 Mask Register
OC7D — Output Compare 7 Data Register
Enhanced Capture Timer
Technical Data
252
RESET:
RESET:
OC7M7
OC7D7
Bit 7
Bit 7
NOTE:
0
0
OC7M6
OC7D6
6
0
6
0
FOC[7:0] — Force Output Compare Action for Channel 7-0
Read or write anytime.
The bits of OC7M correspond bit-for-bit with the bits of timer port
(PORTT). Setting the OC7Mn will set the corresponding port to be an
output port regardless of the state of the DDRTn bit when the
corresponding TIOSn bit is set to be an output compare. This does not
change the state of the DDRT bits. At successful OC7, for eachbit that is
set in OC7M, the corresponding data bit in OC7D is stored to the
corresponding bit of the timer port.
OC7M has priority over output action on timer port enabled by OMn and
OLn bits in TCTL1 and TCTL2. If an OC7M bit is set, it prevents the
action of corresponding OM and OL bits on the selected timer port.
Read or write anytime.
The bits of OC7D correspond bit-for-bit with the bits of timer port
(PORTT). When a successful OC7 compare occurs, for each bit that is
set in OC7M, the corresponding data bit in OC7D is stored to the
corresponding bit of the timer port.
A write to this register with the corresponding data bit(s) set causes
the action which is programmed for output compare “n” to occur
immediately. The action taken is the same as if a successful
comparison had just taken place with the TCn register except the
interrupt flag does not get set.
Freescale Semiconductor, Inc.
For More Information On This Product,
OC7M5
OC7D5
5
0
5
0
Go to: www.freescale.com
Enhanced Capture Timer
OC7M4
OC7D4
4
0
4
0
OC7M3
OC7D3
3
0
3
0
OC7M2
OC7D2
2
0
2
0
MC68HC912DT128A — Rev 4.0
OC7M1
OC7D1
1
0
1
0
OC7M0
OC7D0
Bit 0
Bit 0
0
0
MOTOROLA
$0083
$0082