MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 87

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MC912DG128ACPV

Manufacturer Part Number
MC912DG128ACPV
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128ACPV

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Technical Data — MC68HC912DT128A
6.1 Contents
6.2 Introduction
6.3 Internal Resource Mapping
MC68HC912DT128A — Rev 4.0
MOTOROLA
6.2
6.3
6.4
6.5
6.6
6.7
After reset, most system resources can be mapped to other addresses
by writing to the appropriate control registers.
The internal register block, RAM, and EEPROM have default locations
within the 64K byte standard address space but may be reassigned to
other locations during program execution by setting bits in mapping
registers INITRG, INITRM, and INITEE. During normal operating modes
these registers can be written once. It is advisable to explicitly establish
these resource locations during the initialization phase of program
execution, even if default values are chosen, in order to protect the
registers from inadvertent modification later.
Writes to the mapping registers go into effect between the cycle that
follows the write and the cycle after that. To assure that there are no
Freescale Semiconductor, Inc.
For More Information On This Product,
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Internal Resource Mapping. . . . . . . . . . . . . . . . . . . . . . . . . . . .87
Flash EEPROM mapping through internal Memory Expansion 92
Miscellaneous System Control Register . . . . . . . . . . . . . . . . . . 96
Mapping test registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99
Memory Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100
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Resource Mapping
Section 6. Resource Mapping
Technical Data
87

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