MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 267

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MC912DG128ACPV

Manufacturer Part Number
MC912DG128ACPV
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128ACPV

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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DLYCT — Delay Counter Control Register
ICOVW — Input Control Overwrite Register
MC68HC912DT128A — Rev 4.0
MOTOROLA
RESET:
RESET:
NOVW7
BIT 7
BIT 7
0
0
0
NOVW6
6
0
0
6
0
PAxEN — 8-Bit Pulse Accumulator ‘x’ Enable
Read or write any time.
If enabled, after detection of a valid edge on input capture pin, the delay
counter counts the pre-selected number of M clock (module clock)
cycles, then it will generate a pulse on its output. The pulse is generated
only if the level of input signal, after the preset delay, is the opposite of
the level before the transition.This will avoid reaction to narrow input
pulses.
After counting, the counter will be cleared automatically.
Delay between two active edges of the input signal period should be
longer than the selected counter delay.
DLYx — Delay Counter Select
Read or write any time.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = 8-Bit Pulse Accumulator is disabled.
1 = 8-Bit Pulse Accumulator is enabled.
NOVW5
5
0
0
5
0
Go to: www.freescale.com
Enhanced Capture Timer
NOVW4
4
0
0
4
0
DLY1
0
0
1
1
NOVW3
3
0
0
3
0
DLY0
0
1
0
1
NOVW2
Delay
Disabled (bypassed)
256M clock cycles
512M clock cycles
1024 M clock cycles
2
0
0
2
0
NOVW1
DLY1
1
0
1
0
Timer Register Descriptions
Enhanced Capture Timer
NOVW0
DLY0
BIT 0
BIT 0
0
0
Technical Data
$00AA
$00A9
267

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