MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 56

• Manufacturer Part Number: MC912DG128ACPV
• Description: IC MCU 128K FLASH 8MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912DG128ACPV

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Pinout and Signal Descriptions
3.5 Port Signals
3.5.1 Port A
Technical Data
56
Pin Name
1. MC68HC912DT128A only
KWH[7:0]
KWJ[7:0]
SDA
Shared
PH[7:0]
PJ[7:0]
PIB6
port
Table 3-2. MC68HC912DT128A Signal Description Summary
Number
112-pin
32–35,
19–22
49–52
8–11,
Pin
99
The MC68HC912DT128A incorporates eleven ports which are used to
control and access the various device subsystems. When not used for
these purposes, port pins may be used for general-purpose I/O. In
addition to the pins described below, each port consists of a data register
which can be read and written at any time, and, with the exception of port
AD0, port AD1, PE[1:0], RxCAN and TxCAN, a data direction register
which controls the direction of each pin. After reset all general purpose
I/O pins are configured as input.
Port A pins are used for address and data in expanded modes. When
this port is not used for external access such as in single-chip mode,
these pins can be used as general purpose I/O. The port data register is
not in the address map during expanded and peripheral mode operation.
When it is in the map, port A can be read or written at anytime.
Register DDRA determines whether each port A pin is an input or output.
DDRA is not in the address map during expanded and peripheral mode
operation. Setting a bit in DDRA makes the corresponding bit in port A
an output; clearing a bit in DDRA makes the corresponding bit in port A
an input. The default reset state of DDRA is all zeroes.
When the PUPA bit in the PUCR register is set, all port A input pins are
pulled-up internally by an active pull-up device. PUCR is not in the
address map in peripheral mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
I
Key wake-up and general purpose I/O; can cause an interrupt when an input
Key wake-up and general purpose I/O; can cause an interrupt when an input
2
C bus serial data line pin
transitions from high to low or from low to high (KWPJ).
transitions from high to low or from low to high (KWPH).
Pinout and Signal Descriptions
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Description
MC68HC912DT128A — Rev 4.0
MOTOROLA