MC912DG128ACPV Freescale Semiconductor, MC912DG128ACPV Datasheet - Page 466

• Manufacturer Part Number: MC912DG128ACPV
• Description: IC MCU 128K FLASH 8MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912DG128ACPV

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Glossary
latch — A circuit that retains the voltage level (logic 1 or logic 0) written to it for as long as power
latency — The time lag between instruction completion and data movement.
least significant bit (LSB) — The rightmost digit of a binary number.
logic 1 — A voltage level approximately equal to the input power voltage (V
logic 0 — A voltage level approximately equal to the ground voltage (V
low byte — The least significant eight bits of a word.
M68HC12 — A Motorola family of 16-bit MCUs.
mark/space — The logic 1/logic 0 convention used in formatting data in serial communication.
mask — 1. A logic circuit that forces a bit or group of bits to a desired state. 2. A photomask used
MCU — Microcontroller unit. See “microcontroller.”
memory location — Each M68HC12 memory location holds one byte of data and has a unique
memory map — A pictorial representation of all memory locations in a computer system.
MI-Bus — See "Motorola interconnect bus".
microcontroller — Microcontroller unit (MCU). A complete computer system, including a CPU,
modulo counter — A counter that can be programmed to count to any number from zero to its
most significant bit (MSB) — The leftmost digit of a binary number.
Technical Data
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is applied to the circuit.
in integrated circuit fabrication to transfer an image onto silicon.
address. To store information in a memory location, the CPU places the address of the
location on the address bus, the data information on the data bus, and asserts the write
signal. To read information from a memory location, the CPU places the address of the
location on the address bus and asserts the read signal. In response to the read signal,
the selected memory location places its data onto the data bus.
memory, a clock oscillator, and input/output (I/O) on a single integrated circuit.
maximum possible modulus.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Glossary
MC68HC912DT128A — Rev 4.0
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MOTOROLA